Light-emitting diode chip and manufacturing method thereof

US12575229B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12575229-B2
Application numberUS-202217833921-A
CountryUS
Kind codeB2
Filing dateJun 7, 2022
Priority dateJun 7, 2021
Publication dateMar 10, 2026
Grant dateMar 10, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure provides a light-emitting diode chip, which includes a substrate, an epitaxial structure, an electrode metal layer, and a eutectic metal layer. The eutectic metal layer has an elongation greater than that of the electrode metal layer, and a hardness less than that of the electrode metal layer.

First claim

Opening claim text (preview).

What is claimed is: 1 . A light-emitting diode chip, comprising: a substrate; an epitaxial structure provided on the substrate, the epitaxial structure comprising a first semiconductor layer, a light-emitting layer and a second semiconductor layer which are laminated in a direction away from the substrate; an electrode metal layer provided on the epitaxial structure, the electrode metal layer comprising a first electrode connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer, the first electrode being insulated from the second electrode; and a eutectic metal layer provided on the electrode metal layer, the eutectic metal layer comprising a first eutectic electrode connected to the first electrode and a second eutectic electrode connected to the second electrode, the first eutectic electrode being insulated from the second eutectic electrode, wherein the eutectic metal layer has an elongation greater than that of the electrode metal layer and a hardness less than that of the electrode metal layer, and the eutectic metal layer comprises a pure aluminum reflective layer. 2 . The light-emitting diode chip of claim 1 , wherein the electrode metal layer comprises an aluminum alloy reflective layer. 3 . The light-emitting diode chip of claim 2 , wherein a percentage of alloying elements in the aluminum alloy reflective layer is less than or equal to 15% by mass, and the alloying elements comprise at least one of chromium, copper, magnesium, manganese, nickel or zinc. 4 . The light-emitting diode chip of claim 1 , wherein an orthographic projection of the eutectic metal layer on the substrate is larger than an orthographic projection of the electrode metal layer on the substrate. 5 . The light-emitting diode chip of claim 1 , further comprising a current spreading layer provided on a surface of the second semiconductor layer, the current spreading layer, the second semiconductor layer and the light-emitting layer being commonly provided with an opening that extends therethrough to a surface of the first semiconductor layer, wherein the first electrode is provided on a part of the surface of the first semiconductor layer within the opening, and is insulated from the light-emitting layer, the second semiconductor layer and the current spreading layer, the second electrode being provided on a surface of the current spreading layer. 6 . The light-emitting diode chip of claim 5 , further comprising an insulating layer provided on a part of the surface of the current spreading layer that is not covered by the second electrode, a sidewall of the opening and an exposed part of the surface of the first semiconductor layer, and between the electrode metal layer and the eutectic metal layer, the first eutectic electrode being connected to the first electrode through a first via in the insulating layer, the second eutectic electrode being connected to the second electrode through a second via in the insulating layer. 7 . The light-emitting diode chip of claim 6 , wherein the insulating layer comprises a Bragg reflector layer. 8 . A method for manufacturing a light-emitting diode chip, comprising: providing a substrate; growing an epitaxial structure on the substrate, the epitaxial structure comprising a first semiconductor layer, a light-emitting layer and a second semiconductor layer which are laminated in a direction away from the substrate; forming an electrode metal layer on the epitaxial structure, the electrode metal layer comprising a first electrode connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer, the first electrode being insulated from the second electrode; and forming a eutectic metal layer on the electrode metal layer, the eutectic metal layer comprising a first eutectic electrode connected to the first electrode and a second eutectic electrode connected to the second electrode, the first eutectic electrode being insulated from the second eutectic electrode, wherein the eutectic metal layer has an elongation greater than that of the electrode metal layer and a hardness less than that of the electrode metal layer, and the eutectic metal layer comprises a pure aluminum reflective layer. 9 . The method of claim 8 , wherein the forming the electrode metal layer on the epitaxial structure comprises forming, on the epitaxial structure, a metal stack comprising an aluminum alloy reflective layer. 10 . The method of claim 8 , wherein the forming the eutectic metal layer on the electrode metal layer comprises forming, on the electrode metal layer, a metal stack comprising a pure aluminum reflective layer.

Assignees

Inventors

Classifications

  • the light-emitting regions comprising nitride materials · CPC title

  • having reflecting means, e.g. semiconductor Bragg reflectors · CPC title

  • of electrodes · CPC title

  • extending at least partially through the bodies · CPC title

  • Reflective coatings, e.g. dielectric Bragg reflectors · CPC title

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Frequently asked questions

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What does patent US12575229B2 cover?
The present disclosure provides a light-emitting diode chip, which includes a substrate, an epitaxial structure, an electrode metal layer, and a eutectic metal layer. The eutectic metal layer has an elongation greater than that of the electrode metal layer, and a hardness less than that of the electrode metal layer.
Who is the assignee on this patent?
Xiamen Sanan Optoelectronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10H20/835. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 10 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).