Amplifiers

Patent metadata

Field	Value
Publication number	US-12570018-B2
Application number	US-202318306742-A
Country	US
Kind code	B2
Filing date	Apr 25, 2023
Priority date	Aug 19, 2020
Publication date	Mar 10, 2026
Grant date	Mar 10, 2026

Abstract

This application relates to an amplifier selectively operable in first or second modes. The first mode is a BTL mode with first and second output drivers ( 103 p, 103 n ) both active to generate respective driving signals that vary with an input signal. The second mode is an SE mode, where the first output driver ( 103 p ) is active to generate a driving signal at and the output of the second driver ( 103 n ) is held constant. A controller ( 201 ) selectively controls the mode based on an indication of output signal amplitude. In the first mode, a ratio of magnitude of the two driving signals varies with the indication of output signal amplitude, i.e. the magnitudes of the two driving signals may vary so as to be not equal.

First claim

The invention claimed is:

1 . An amplifier circuit for generating an output signal between first and second output nodes based on a received input signal, the amplifier circuit comprising:
first and second output drivers; and a controller for selectively controlling the amplifier circuit in a first mode or a second mode based on an indication of output signal amplitude; wherein: in the first mode the first and second output drivers are both active to generate respective first and second driving signals that each vary with the input signal at the first and second output nodes respectively; and in the second mode the first output driver is active to generate a first driving signal at the first output node that varies with the input signal and the second driver is controlled to maintain the second output node at a constant voltage; and wherein in the second mode, the second output driver is operated in a mode with a lower power consumption than in the first mode.

2 . The amplifier circuit of claim 1 wherein the second output driver comprises a switched-mode amplifier having a switching output stage with at least first switch for selectively connecting a driver output node to a high-side voltage and a second switch for selectively connecting the driver output node to a low-side voltage, and a modulator for controlling switching of the switching output stage with a controlled duty-cycle in to generate an output voltage at the second output node.

3 . The amplifier circuit of claim 2 wherein the modulator is configured to be operable in the first mode to control the duty-cycle of the switching output stage in a switching cycle at a first frequency based on the input signal and to be operable in the second mode to control the duty-cycle of the switching output stage in a switching cycle at a second frequency to generate the constant voltage, wherein the second frequency is lower than the first frequency.

4 . The amplifier circuit of claim 2 wherein the modulator is configured to be operable in the second mode to compare an indication of the output voltage or an indication of an error between the output voltage and a pre-set value of the constant voltage to one or more thresholds and to only switch the output stage when one of the one or more thresholds is reached.

5 . The amplifier circuit of claim 2 wherein at least one of the first and second switches comprises a transistor switch configured such that size of the transistor switch which is actively switched is variable and wherein the second output driver is configured such that the size of the transistor switch which is actively switched in the second mode is smaller than the size of the transistor switch which is actively switched in the first mode.

6 . The amplifier circuit of claim 2 wherein at least one of the first and second switches comprises a plurality of transistor switch elements in parallel and wherein the second output driver is configured so as to switch a first set of one or more transistor switch elements in the first mode and to switch a second set of one or more transistor switch elements in the first mode, wherein the combined size of the second set of transistor switch elements is smaller than the combined size of the first set of transistor switch elements.

7 . The amplifier circuit of claim 2 wherein the second output driver is implemented as a closed-loop switched-mode amplifier and wherein the second output driver is configured to use a feedback signal tapped from a first feedback point in the first mode of operation and a feedback signal tapped from a second, different, feedback point in the second mode of operation.

8 . The amplifier circuit of claim 7 wherein the first feedback point is between the second output driver and an output filter and the second feedback point is within or on an opposite side of the filter.

9 . The amplifier circuit of claim 1 wherein in the first mode a ratio of magnitude of the second driving signal compared to magnitude of the first driving signal varies with the indication of output signal amplitude.

10 . The amplifier circuit of claim 9 wherein the controller is configured such that, when operating in the first mode, the ratio of magnitude of the second driving signal compared to magnitude of the first driving signal varies within a range from zero to one and increases with increasing indication of output signal amplitude.

11 . The amplifier circuit of claim 10 wherein the controller is configured to, in the first mode, minimise the ratio of magnitude of the second driving signal compared to the magnitude of the first driving signal.

12 . The amplifier circuit of claim 9 wherein the first output driver is located in a first signal path and the second output driver is located in a second signal path and wherein the controller is configured to control the ratio of magnitude of the second driving signal compared to magnitude of the first driving signal by controlling gains applied in the first and second signal paths.

13 . The amplifier circuit of claim 1 wherein the controller is further configured to selectively control a bias applied to at least the first output driver based on the indication of the amplitude of the output signal.

14 . The amplifier circuit of claim 13 wherein the controller is configured such that a lower bias current is applied to the first output driver in the second mode than in the first mode.

15 . The amplifier circuit of claim 13 wherein the controller is configured such that a bias current applied to the first output driver in the first mode increases with increasing output signal amplitude.

16 . The amplifier circuit of claim 1 further comprising a load transducer coupled between the first and second output nodes.

17 . The amplifier circuit of claim 16 wherein the load transducer comprises a loudspeaker.

18 . An electronic device comprising the amplifier circuit of claim 1 .

19 . An amplifier circuit for generating an output signal between first and second output nodes based on a received input signal, the amplifier circuit comprising:
first and second output drivers; and a controller for selectively controlling the amplifier circuit in a first mode or a second mode based on an indication of output signal amplitude; wherein: in the first mode the first and second output drivers are both active to generate respective first and second driving signals that each vary with the input signal at the first and second output nodes respectively; and in the second mode the first output driver is active to generate a first driving signal at the first output node that varies with the input signal and the second driver is controlled to maintain the second output node at a constant voltage; and wherein in the first mode a ratio of magnitude of the second driving signal compared to magnitude of the first driving signal varies with the indication of output signal amplitude.

20 . An amplifier circuit comprising:
a first signal path comprising a first amplifier; a second signal path comprising a second amplifier; and a controller for selectively operating the circuit in: a first mode, in which both the first amplifier and second amplifier are active to drive first and second output nodes with respective first and second driving signals that each vary with the input signal; and a second mode in which the first amplifier is active to drive the first output node with the first driving signal that varies with the input signal and the second output node is

Assignees

• Cirrus Logic Int Semiconductor Ltd
• Cirrus Logic Inc

Inventors

• Lesso John P

Classifications

• B26F3/08

  with heated members · CPC title

• B26D7/204

  Anvil rollers · CPC title

• H03F3/2173

  of the bridge type · CPC title

• H03F3/185

  with field-effect devices (H03F3/187 takes precedence) · CPC title

• B26D1/265 Primary

  for thin material, e.g. for sheets, strips or the like · CPC title