Audio amplifier assemblies, processes, and methods

Patent metadata

Field	Value
Publication number	US-11063565-B2
Application number	US-201916283682-A
Country	US
Kind code	B2
Filing date	Feb 22, 2019
Priority date	Feb 23, 2018
Publication date	Jul 13, 2021
Grant date	Jul 13, 2021

Abstract

An amplifier having one or more channels where each channel includes a two half bridges (a master and slave sub-channel). The sub-channels can be connected either in parallel or in a full-bridge configuration via internal switches that route signals to a pair of speaker jacks. One switch in the amplifier has a first position that selectively connects the outputs of the master and slave sub-channel to the same input of the speaker load so that the two sub-channels will drive the speaker load in parallel and a second position where the output of the slave sub-channel is connected to another input of the speaker load so that the master sub-channel and the slave sub-channel will drive the speaker load in a Full-bridge configuration. A second switch has a first position that connects a second input of the speaker load to ground or reference potential of the sub-channels when the speaker load is to be driven in parallel and a second position that is a No-connect position that is used when the speaker load is driven in the Full-bridge configuration and a ground potential is not to be connected to the speaker.

First claim

We claim:

1. An amplifier configured to drive a speaker load, comprising:
a first sub-channel configured to create an amplified version of an input signal with a modulated driving signal;
a second sub-channel configured to create an amplified version of the input signal with the modulated driving signal;
first and second speaker terminals to which a speaker load can be connected, wherein an output of the first sub-channel is connected to the first speaker terminal;
a first switch having a first position and a second position, wherein the first switch is configured to connect an output of the second sub-channel to the first speaker terminal to drive the speaker load in parallel when the first switch is in the first position and to connect the output of the second sub-channel to the second speaker terminal so that the first sub-channel and the second sub-channel can drive the speaker load in a bridge tied load configuration when the first switch is in the second position; and
a second switch having a first position and a second position, wherein the first position of the second switch is configured to connect a ground of the second sub-channel to the second speaker terminal tat is used when the speaker load is to be driven in parallel, and wherein the second position of the second switch has a no contact positon that is used when the speaker load is to be driven in the bridge tied load configuration.

2. The amplifier of claim 1 , where the amplifier further includes:
an input signal port on which the input signal is received;
a single internal modulator coupled to the input signal port that is configured to produce the modulated driving signal from the input signal.

3. The amplifier of claim 2 , where the amplifier includes:
an input port on which a modulated driving signal from an external modulator can be received; and
a third switch that is configured to connect the modulated driving signal from the internal modulator or the modulated driving signal from the external modulator to the first and second sub-channels.

4. The amplifier of claim 1 , wherein the first and second sub-channels each include a half bridge amplifier with transistors that are driven by the modulated driving signal to produce the amplified version of the input signal.

5. The amplifier of claim 1 , further including an inverter that selectively inverts a polarity of the modulated driving signals when the first switch is in the second position to drive the speaker load in a bridge tied load configuration.

6. The amplifier of claim 1 , further comprising a processor that is configured to execute instructions to set the positions of the first and second switches.

7. The amplifier of claim 6 , wherein the amplifier further includes:
an input signal port on which the input signal is received;
a single internal modulator coupled to the input signal port that is configured to produce the modulated driving signal from the input signal,
wherein the processor is configured to execute instructions to produce the input signal for the single internal modulator.

8. The amplifier of claim 7 , wherein the processor is configured to execute instructions to set the first switch in the first position and the second switch in the second no contact position and to execute instructions to control an inverter to invert a polarity of the input signal produced by the processor for the single internal modulator in order to reduce voltages on power supply rails of the first and second sub-channels.

9. The amplifier of claim 1 , further comprising a processor that is configured to execute program instructions to determine an impedance and power rating of a speaker load attached to the first and second speaker terminals and to set the position of the first and second switches in accordance with the determined impedance and power rating.

10. The amplifier of claim 9 , wherein the processor is configured to execute instructions to receive information about the impedance and power rating of a speaker load supplied on a user interface.

11. The amplifier of claim 9 , wherein the processor is configured to execute instructions to activate a circuit to measure a current through a speaker load in response to a modulated driving signal that produces a known voltage at the outputs of the first or second subchannels to determine an impedance of the speaker load.

12. The amplifier of claim 9 , wherein the processor is configured to execute instructions to read information about the impedance and power rating of the speaker load from a memory associated with the speaker load.

13. The amplifier of claim 12 , wherein the memory is an RFID tag associated with the speaker load and the processor is configured to execute instructions to receive the impedance and power rating information from an RFID tag reader.

14. The amplifier of claim 9 , wherein the processor is configured to execute instructions to receive information about the impedance and power rating of a speaker load received by a communication circuit in the amplifier channel.

15. An amplifier configured to drive a speaker load, comprising:
a first half bridge sub-channel configured to create an amplified version of an input signal with a modulated driving signal;
a second half bridge sub-channel configured to create an amplified version of the input signal with the modulated driving signal;
first and second speaker terminals to which a speaker load can be connected; and
switches within the amplifier channel that are controllable to connect outputs of the first and second half bridge sub-channels to the same speaker terminal to drive the speaker load in parallel or to connect the outputs of the first and second half bridge sub-channels to different speaker terminals to drive the speaker load in a bridge tied load configuration, wherein:
a first switch has a first position connecting an output of the half bridge second sub-channel to the first speaker terminal and a second position connecting the output of the second half bridge sub-channel to the second speaker terminal, and

a second switch has a first position connecting a ground of the half bridge second sub-channel to the second speaker terminal and a second position that is a no contact position.

16. The amplifier of claim 15 , further comprising an internal modulator that is configured to produce modulated driving signals for the first and second half bridge sub-channels.

17. The amplifier of claim 16 , further comprising an input on which a modulated driving signal from an external modulator can be received and a switch for connecting the modulated driving signal from the internal modulator or from the external modulator to the first and second half bridge sub-channels.

18. The amplifier of claim 15 , further comprising a processor that is configured to execute instruction to determine an impedance and power rating of the speaker load and to set a position of the switches based on the determined impedance and power rating.

Assignees

• Qsc Llc

Inventors

• Lind Anders
• Skogmo Matthew

Classifications

• H03F3/185

  with field-effect devices (H03F3/187 takes precedence) · CPC title

• H03F2200/321

  Use of a microprocessor in an amplifier circuit or its control circuit · CPC title

• H03F3/68 Primary

  Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics {(power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602)} · CPC title

• H03F3/2173 Primary

  of the bridge type · CPC title

• H03F1/0277

  Selecting one or more amplifiers from a plurality of amplifiers · CPC title