Undercoating coverage and resistance control for ESCS of substrate processing systems

US12565701B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12565701-B2
Application numberUS-202218729093-A
CountryUS
Kind codeB2
Filing dateDec 13, 2022
Priority dateJan 28, 2022
Publication dateMar 3, 2026
Grant dateMar 3, 2026

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An electrostatic chuck (ESC) undercoating system includes a memory and a controller. The memory stores an undercoat application. The controller configured to execute the undercoat application to: determine undercoat parameters; perform a full clean process to remove undercoat deposits in processing chamber of substrate processing system; and based on the undercoat parameters, perform one or more deposition processes to deposit one or more undercoat layers on the ESC to provide an overall undercoat layer having an overall thickness between 7-15 μm, the one or more undercoat layers providing protection of the ESC during subsequent deposition processing of a substrate on the ESC.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method for forming an overall undercoat layer on an electrostatic chuck (ESC), the method comprising: determining undercoat parameters; performing a full clean process to remove undercoat deposits in processing chamber of substrate processing system; and based on the undercoat parameters, performing one or more deposition processes to deposit one or more undercoat layers on the ESC to provide the overall undercoat layer having an overall thickness between 7-15 μm, the one or more undercoat layers providing protection of the ESC during subsequent deposition processing of a substrate on the ESC. 2 . The method of claim 1 , wherein the undercoat parameters include radio frequency power levels, gas flow rates, gas flow pressures, gas species, and durations of deposition processes. 3 . The method of claim 1 , wherein the undercoat parameters include a size of a gap between the ESC and a showerhead for each undercoat layer formed during deposition of the one or more undercoat layers. 4 . The method of claim 1 , wherein the full clean process includes supplying ammonia to the processing chamber. 5 . The method of claim 1 , wherein the one or more undercoat layers comprise: a first undercoat layer; and a second undercoat layer disposed on the first undercoat layer. 6 . The method of claim 5 , wherein each of the first undercoat layer and the second undercoat layer comprises at least one of silicon oxide or silicon nitride. 7 . The method of claim 5 , wherein the first undercoat layer and the second undercoat layer comprise silicon oxide. 8 . The method of claim 5 , wherein: the first undercoat layer comprises silicon oxide or silicon oxynitride; and the second undercoat layer comprises silicon nitride or silicon oxynitride. 9 . The method of claim 5 , wherein: the first undercoat layer comprises silicon oxide; and the second undercoat layer comprises silicon nitride or silicon oxynitride. 10 . The method of claim 5 , wherein the second undercoat layer is thinner than the first undercoat layer. 11 . The method of claim 5 , further comprising setting a size of a gap between the ESC and a showerhead to be greater for deposition of the second undercoat layer than for deposition of the first undercoat layer. 12 . The method of claim 5 , further comprising setting a size of a gap between the ESC and a showerhead for deposition of the first undercoat layer and refrain from changing the size of the gap for deposition of the second undercoat layer. 13 . The method of claim 1 , wherein the one or more undercoat layers comprise: a first undercoat layer; one or more intermediate undercoat layers disposed on the first undercoat layer; and a last undercoat layer disposed on the one or more intermediate undercoat layers. 14 . The method of claim 13 , wherein: the first undercoat layer is formed of silicon oxide or silicon oxynitride; and each of the one or more intermediate undercoat layers and the last undercoat layer is formed of at least one of silicon oxide or silicon nitride. 15 . The method of claim 13 , further comprising setting a size of a gap between the ESC and a showerhead to be greater for deposition of at least one of the one or more intermediate undercoat layers and the last undercoat layer than for deposition of the first undercoat layer. 16 . The method of claim 13 , further comprising setting a size of a gap between the ESC and a showerhead for deposition of the first undercoat layer and refrain from changing the size of gap for deposition of the one or more intermediate undercoat layers and the last undercoat layer. 17 . The method of claim 1 , further comprising, based on an amount of estimated bowing of a substrate to be processed, selecting the overall thickness. 18 . The method of claim 1 , further comprising introducing one or more precursors into the processing chamber for deposition of the one or more undercoat layers, wherein the one or more precursors are selected from silane, nitrous oxide and nitrogen. 19 . A substrate deposition method comprising: the method of claim 1 ; supplying current to the ESC to electrostatically clamp the substrate to the ESC; controlling a gas delivery system and a radio frequency generating system to deposit the one or more undercoat layers on the ESC; and subsequent to forming the one or more undercoat layers on the ESC, performing the deposition processing of the substrate on the ESC.

Assignees

Inventors

Classifications

  • Details of electrostatic chucks · CPC title

  • CVD [Chemical Vapor Deposition] · CPC title

  • Gas control, e.g. control of the gas flow · CPC title

  • Controlling or regulating the coating process {(C23C16/45557, C23C16/279 take precedence)} · CPC title

  • Flat-bed apparatus · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12565701B2 cover?
An electrostatic chuck (ESC) undercoating system includes a memory and a controller. The memory stores an undercoat application. The controller configured to execute the undercoat application to: determine undercoat parameters; perform a full clean process to remove undercoat deposits in processing chamber of substrate processing system; and based on the undercoat parameters, perform one or mor…
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification H10P72/72. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 03 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).