Method for processing input variables by means of a processing device having at least one transistor, device for executing the method, computing device and use

Patent metadata

Field	Value
Publication number	US-12562742-B2
Application number	US-202418600281-A
Country	US
Kind code	B2
Filing date	Mar 8, 2024
Priority date	Mar 17, 2023
Publication date	Feb 24, 2026
Grant date	Feb 24, 2026

Abstract

A method for processing input variables by means of a processing device having least a first transistor. The method including: providing the first transistor and a first memristive element, which characterizes a first input variable associated with the first transistor, wherein a charging current of a capacitance associated with a control electrode of the first transistor can be influenced using the first memristive element; applying to the control electrode of the first transistor a first output variable which characterizes a second input variable associated with the first transistor; ascertaining a first output variable which characterizes at least one product of the first input variable and of the second input variable, based on a first variable characterizing a time profile of a current through a load path of the first transistor.

First claim

The invention claimed is:

1 . A method for processing input variables using a processing device having at least a first transistor, comprising:
providing the first transistor, and a first memristive element which characterizes a first input variable associated with the first transistor, wherein a charging current of a capacitance associated with a control electrode of the first transistor can be influenced using the first memristive element; applying to the control electrode of the first transistor a first control variable which characterizes a second input variable associated with the first transistor; and ascertaining a first output variable which characterizes at least one product of the first input variable and of the second input variable, based on a first variable characterizing a time profile of a current through a load path of the first transistor.

2 . The method according to claim 1 , wherein the first variable is at least one of the following elements: a) the current through the load path itself; b) a voltage which can be ascertained based on at least the current through the load path.

3 . The method according to claim 1 , further comprising at least one of the following steps: a) using an intrinsic and/or parasitic capacitance of the first transistor, as the capacitance associated with the control electrode of the first transistor; b) providing an external capacitance for the capacitance associated with the control electrode of the first transistor.

4 . The method according to claim 1 , further comprising:
switching the first memristive element in series with the control electrode of the first transistor; applying the first control variable to the control electrode of the first transistor via the first memristive element.

5 . The method according to claim 1 , further comprising:
switching the first memristive element in series with a load path of the first transistor; and applying the first control variable to the control electrode of the first transistor.

6 . The method according to claim 1 , further comprising:
providing a charging current for charging the capacitance associated with the control electrode of the first transistor.

7 . The method according to claim 1 , further comprising:
providing an input voltage based on the second input variable; applying the input voltage to the control electrode of the first transistor; and at least periodically charging the capacitance associated with the control electrode of the first transistor.

8 . The method according to claim 1 , further comprising:
ascertaining a first point in time at which the current through the load path of the first transistor exceeds a prespecifiable first threshold value; and ascertaining the first output variable based on the first point in time.

9 . The method according to claim 8 , wherein the prespecifiable first threshold value corresponds to at least one of the following elements: a) saturation current of the first transistor; b) a limit current to which the current through the load path of the first transistor can be limited and/or is limited; c) any prespecifiable current value.

10 . The method according to claim 1 , further comprising:
ascertaining a first time difference between a start of the application of the first control variable to the control electrode of the first transistor and a first point in time at which the current through the load path of the first transistor exceeds the prespecifiable first threshold value; and ascertaining the first output variable based on the first time difference.

11 . The method according to claim 1 , further comprising:
limiting the current through the load path of the first transistor using at least one limiting resistor connected in series with the load path.

12 . The method according to claim 1 , wherein the processing device includes at least one further transistor, wherein a corresponding first terminal of a load path of the first transistor and of the at least one further transistor is connected to a first circuit node, and wherein the method further comprises:
providing the at least one further transistor, and a corresponding further memristive element which characterizes a first input variable associated with the at least one further transistor, wherein a charging current of a capacitance associated with a control electrode of the at least one further transistor can be influenced using the corresponding further memristive element; applying to a corresponding control electrode of the at least one further transistor a corresponding first control variable which characterizes a corresponding second input variable associated with the corresponding further transistor; and ascertaining the first output variable, which characterizes a sum of respective products of the corresponding first input variable and of the corresponding second input variable, based on a second variable characterizing a time profile of a current associated with the first circuit node, wherein the second variable is at least one of the following elements: a) the current associated with the first circuit node; b) a voltage that can be ascertained based on at least the current associated with the first circuit node.

13 . The method according to claim 12 , further comprising:
starting the application of the first control variable to the control electrode of the first transistor at a starting point in time; and repeatedly ascertaining the second variable during a prespecifiable time period from the starting point in time.

14 . The method according to claim 12 , further comprising:
ascertaining changes of the second variable at prespecifiable times, wherein the prespecifiable points in time are each associated with possible values for the corresponding first input variable and/or for the corresponding second input variable; and weighting the ascertained changes of the second variable, wherein weighted changes are obtained, and ascertaining the first output variable by summing the weighted changes of the second variable.

15 . The method according to claim 14 , further comprising:
repeating the ascertainment and weighting until a prespecifiable abort criterion is met.

16 . The method according to claim 14 , further comprising:
assigning the prespecifiable points in time to possible values for the corresponding first input variable and/or for the corresponding second input variable.

17 . The method according to claim 1 , wherein the method is used for at least one of the following elements: a) execution of compute-in-memory methods; b) artificial neural networks; c) image processing; d) efficient execution of calculations; e) increasing an efficiency for the execution of calculations; f) automated driving; g) machine learning.

18 . A device for processing input variables, the device configured to:
i) provide a first transistor, and a first memristive element which characterizes a first input variable associated with the first transistor, wherein a charging current of a capacitance associated with a control electrode of the first transistor can be influenced using the first memristive element; ii) apply to the control electrode of the first transistor a first control variable which characterizes a second input variable associated with the first transistor; and iii) ascertain a first output variable which characterizes at least one product of the first input variable and of the second input variable, based on a first variable characterizing a time profile of a current through a load path of th

Assignees

• Bosch Gmbh Robert

Inventors

• Soliman Taha
• Kirchner Tobias

Classifications

• G11C13/0002

  using resistive RAM [RRAM] elements · CPC title

• G11C13/004

  Reading or sensing circuits or methods · CPC title

• G11C11/54

  using elements simulating biological cells, e.g. neuron · CPC title

• G11C13/0007

  comprising metal oxide memory material, e.g. perovskites · CPC title

• G06F17/16

  Matrix or vector computation {, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization (matrix transposition G06F7/78)} · CPC title