Device data processing using shared memory pool

US12561247B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12561247-B2
Application numberUS-202418771430-A
CountryUS
Kind codeB2
Filing dateJul 12, 2024
Priority dateJan 14, 2022
Publication dateFeb 24, 2026
Grant dateFeb 24, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A computing device includes a central processing unit, at least one heterogeneous device, and a shared memory pool. The central processing unit is configured to: divide the shared memory pool into a plurality of memory spaces, store, in a first memory space in the plurality of memory spaces, first to-be-processed data that is provided by a client and that is associated with a service, and notify a first heterogeneous device of an address of the first to-be-processed data in the first memory space and a first operation that needs to be performed by the first heterogeneous device. The first heterogeneous device performs the first operation on the first to-be-processed data, and stores obtained first data in a second memory space.

First claim

Opening claim text (preview).

What is claimed is: 1 . A computing device comprising: a shared memory pool comprising shared memories; a central processing unit configured to: divide the shared memory pool into memory spaces comprising a first memory space, a second memory space, a third memory space, and a fourth memory space; store, in the first memory space, first to-be-processed data that is from a client and that is associated with a service; send a first notification comprising a first address of the first to-be-processed data in the first memory space and comprising a first operation to be performed on the first to-be-processed data; store, in the third memory space, second to-be-processed data that is from the client and that is associated with the service; send a second notification comprising a second address of the second to-be-processed data in the third memory space, a second operation to be performed on the second to-be-processed data, and a first indication that the fourth memory space is a second storage location of second data generated through the second operation; and send a third notification comprising a third operation to be performed on first data and the second data and comprising a second indication to send third data generated through the third operation to an external computing device; and at least one heterogeneous device comprising: a first heterogeneous device configured to: receive the first notification from the central processing unit; perform the first operation on the first to-be-processed data in the first memory space to obtain the first data; and store the first data in the second memory space; a second heterogeneous device configured to: receive the second notification from the central processing unit; perform the second operation on the second to-be-processed data in the third memory space to obtain the second data; and store the second data in the fourth memory space; and a third heterogeneous device configured to: connect to the external computing device through a network; receive the third notification from the central processing unit; perform the third operation on the first data in the second memory space and the second data in the fourth memory space to obtain the third data; and send the third data to the external computing device. 2 . The computing device of claim 1 , wherein the first notification further comprises an indication that the second memory space is a first storage location of the first data. 3 . The computing device of claim 1 , wherein the first heterogeneous device and the second heterogeneous device are graphics processing units (GPUs). 4 . The computing device of claim 1 , wherein the third heterogeneous device is a graphics processing unit (GPU), a neural processing unit (NPU), or a video processing unit (VPU). 5 . The computing device of claim 1 , wherein the third heterogeneous device is a network adapter. 6 . A method comprising: dividing, by a central processing unit of a computing device, a shared memory pool of the computing device into memory spaces comprising a first memory space, a second memory space, a third memory space, and a fourth memory space; storing, by the central processing unit in the first memory space, first to-be-processed data that is from a client and that is associated with a service; sending, by the central processing unit, a first notification comprising a first address of the first to-be-processed data in the first memory space and comprising a first operation to be performed on the first to-be-processed data; receiving, by a first heterogeneous device of the computing device and from the central processing unit, the first notification; performing, by the first heterogeneous device, the first operation on the first to-be-processed data in the first memory space to obtain first data; storing, by the first heterogeneous device, the first data in the second memory space; storing, by the central processing unit in the third memory space, second to-be-processed data that is from the client and that is associated with the service; sending, by the central processing unit and to a second heterogeneous device of the computing device, a second notification comprising a second address of the second to-be-processed data in the third memory space, a second operation to be performed on the second to-be-processed data, and a first indication that the fourth memory space is a second storage location of second data generated through the second operation; receiving, by the second heterogeneous device and from the central processing unit, the second notification; performing, by the second heterogeneous device, the second operation on the second to-be-processed data in the third memory space to obtain the second data; storing the second data in the fourth memory space; providing, by the central processing unit, a third address of the second memory space and a fourth address of the fourth memory space for a third heterogeneous device of the computing device; sending, by the central processing unit and to the third heterogeneous device, a third notification comprising a third operation to be performed on the first data and the second data and comprising a second indication to send third data generated through the third operation to an external computing device; receiving, by the third heterogeneous device and from the central processing unit, the third notification; performing, by the third heterogeneous device, the third operation on the first data in the second memory space and the second data in the fourth memory space to obtain the third data; and sending, by the third heterogeneous device, the third data to the external computing device. 7 . The method of claim 6 , wherein the first notification further comprises an indication that the second memory space is a first storage location of the first data. 8 . The method of claim 6 , wherein the first heterogeneous device and the second heterogeneous device are graphics processing units (GPUs). 9 . The method of claim 6 , wherein the third heterogeneous device is a graphics processing unit (GPU), a neural processing unit (NPU), or a video processing unit (VPU). 10 . The method of claim 6 , wherein the third heterogeneous device is a network adapter. 11 . A non-transitory computer-readable storage medium storing instructions that, when executed by one or more processors, cause a computing device to: divide, by a central processing unit of the computing device, a shared memory pool into memory spaces comprising a first memory space, a second memory space, a third memory space, and a fourth memory space; store, by the central processing unit in the first memory space, first to-be-processed data that is from a client and that is associated with a service; send, by the central processing unit, a first notification comprising an address of the first to-be-processed data in the first memory space and comprising a first operation to be performed on the first to-be-processed data; receive, by a first heterogeneous device of the computing device and from the central processing unit, the first notification; perform, by the first heterogeneous device, the first operation on the first to-be-processed data in the first memory space to obtain first data; store, by the first heterogeneous device, the first data in the second memory space; store, by the central processing unit in the third memory space, second to-be-processed data that is from the client and that is associated with the service; send, by the central processing unit and to a second heterogeneous device of the computing device, a second notification comprising a second addr

Assignees

Inventors

Classifications

  • Coherency control relating to peripheral accessing, e.g. from DMA or I/O device · CPC title

  • using a common memory, e.g. mailbox · CPC title

  • considering hardware capabilities · CPC title

  • G06F9/5016Primary

    the resource being the memory · CPC title

  • Interprogram communication · CPC title

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Frequently asked questions

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What does patent US12561247B2 cover?
A computing device includes a central processing unit, at least one heterogeneous device, and a shared memory pool. The central processing unit is configured to: divide the shared memory pool into a plurality of memory spaces, store, in a first memory space in the plurality of memory spaces, first to-be-processed data that is provided by a client and that is associated with a service, and notif…
Who is the assignee on this patent?
Huawei Cloud Computing Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F9/5016. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 24 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).