Schottky barrier diode with high withstand voltage

Patent metadata

Field	Value
Publication number	US-12557361-B2
Application number	US-202217582924-A
Country	US
Kind code	B2
Filing date	Jan 24, 2022
Priority date	Nov 9, 2011
Publication date	Feb 17, 2026
Grant date	Feb 17, 2026

Abstract

A Schottky barrier diode, including a first n-type semiconductor layer including a β-Ga2O3-based single crystal epitaxial layer and having a first carrier concentration that determines reverse breakdown voltage and forward voltage, a second n-type semiconductor layer including a β-Ga2O3-based single crystal substrate and having a second carrier concentration that is higher than the first carrier concentration and determines forward voltage, a Schottky electrode provided on a surface of the first n-type semiconductor layer on the opposite side to the second n-type semiconductor layer, and an ohmic electrode provided on a surface of the second n-type semiconductor layer on the opposite side to the first n-type semiconductor layer. The β-Ga2O3-based single crystal substrate includes a surface that has a plane orientation rotated by an angle of not more than 37.5° from a (010) plane.

First claim

What is claimed is:

1 . A Schottky barrier diode, comprising:
a first n-type semiconductor layer comprising a β-Ga 2 O 3 -based single crystal epitaxial layer and having a first carrier concentration that determines reverse breakdown voltage and forward voltage; a second n-type semiconductor layer comprising a β-Ga 2 O 3 -based single crystal substrate and having a second carrier concentration that is greater than the first carrier concentration and determines forward voltage; a Schottky electrode provided on a surface of the first n-type semiconductor layer on the opposite side to the second n-type semiconductor layer; and an ohmic electrode provided on a surface of the second n-type semiconductor layer on the opposite side to the first n-type semiconductor layer, wherein the β-Ga 2 O 3 -based single crystal substrate comprises a surface that has a plane orientation rotated by an angle of not more than 37.5° from a (010) plane to provide a steep interface between the second n-type semiconductor layer and the first n-type semiconductor layer.

2 . The Schottky barrier diode according to claim 1 , wherein the first n-type semiconductor layer has a thickness greater than a thickness of a depletion layer that is determined by the first carrier concentration.

3 . The Schottky barrier diode according to claim 1 , wherein the first carrier concentration in the first n-type semiconductor layer is not more than 1×10 18 /cm 3 .

4 . The Schottky barrier diode according to claim 1 , wherein the first carrier concentration in the first n-type semiconductor layer is not more than 1×10 17 /cm 3 .

5 . The Schottky barrier diode according to claim 1 , wherein the first carrier concentration in the first n-type semiconductor layer is not more than 1×10 16 /cm 3 .

6 . The Schottky barrier diode according to claim 1 , wherein the second carrier concentration in the second n-type semiconductor layer is not less than 1×10 18 /cm 3 .

7 . The Schottky barrier diode according to claim 1 , wherein the first n-type semiconductor layer has a thickness greater than a thickness of a depletion layer.

8 . A Schottky barrier diode, comprising:
a first semiconductor layer of a first-type comprising a β-Ga 2 O 3 -based single crystal epitaxial layer and having a first carrier concentration; a second semiconductor layer of the first-type comprising a β-Ga 2 O 3 -based single crystal substrate and having a second carrier concentration that is greater than the first carrier concentration; a Schottky electrode provided on a surface of the first semiconductor layer of the first-type on the opposite side to the second semiconductor layer of the first-type; and an ohmic electrode provided on a surface of the second semiconductor layer of the first-type on the opposite side to the first semiconductor layer of the first-type, wherein the β-Ga 2 O 3 -based single crystal substrate comprises a surface that has a plane orientation rotated by an angle of not more than a predetermined value from a plane to provide a steep interface between the second semiconductor layer and the first semiconductor layer, wherein the predetermined value of the angle is not more than 37.5° from the plane including a (010) plane, and wherein the first-type is an n-type semiconductor.

9 . The Schottky barrier diode according to claim 8 , wherein the first semiconductor layer of the first-type includes a thickness greater than a thickness of a depletion layer that is determined by the first carrier concentration.

10 . The Schottky barrier diode according to claim 8 , wherein the first carrier concentration in the first semiconductor layer is not more than I×10 18 /cm 3 .

11 . The Schottky barrier diode according to claim 8 , wherein the first carrier concentration in the first semiconductor layer is not more than I×10 17 /cm 3 .

12 . The Schottky barrier diode according to claim 8 , wherein the first carrier concentration in the first semiconductor layer is not more than 1×10 16 /cm 3 .

13 . The Schottky barrier diode according to claim 8 , wherein the second carrier concentration in the second semiconductor layer is not less than 1×10 18 /cm 3 .

Assignees

• Tamura Seisakusho Kk

Inventors

• Takizawa Masaru
• Kuramata Akito

Classifications

• H10P14/2926

  Crystal orientations · CPC title

• H10D62/80 Primary

  characterised by the materials · CPC title

• H10D62/82

  Heterojunctions · CPC title

• H10P14/22

  using physical deposition, e.g. vacuum deposition or sputtering · CPC title

• H10P14/3434

  being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title