Calibration of fully-differential input system

Patent metadata

Field	Value
Publication number	US-12556149-B2
Application number	US-202217848550-A
Country	US
Kind code	B2
Filing date	Jun 24, 2022
Priority date	Oct 19, 2021
Publication date	Feb 17, 2026
Grant date	Feb 17, 2026

Abstract

A method for calibrating a fully-differential input system may include determining a first voltage of a first node of the fully-differential input system, wherein the first node is coupled at the first node to a plurality of first resistors in a first star configuration, determining a second voltage of a second node of the fully-differential input system, wherein the second node is coupled at the second node to a plurality of second resistors in a second star configuration, each resistor of the plurality of second resistors corresponding to a respective resistor of the plurality of first resistors, and trimming individual resistances of the plurality of first resistors and the plurality of second resistors in order to maintain a difference of a first voltage at the first node and a second voltage of the second node at approximately zero.

First claim

What is claimed is:

1 . A method comprising:
determining a first voltage of a first node of the fully-differential input system, wherein the first node is coupled at the first node to a plurality of first resistors in a first star configuration, and wherein the plurality of first resistors comprises: a first input resistor coupled between the first node and a first input of the amplifier system; a first common mode resistor coupled between the first node and a common mode voltage node of the amplifier system; and a first feedback resistor coupled between the first node and a first output node of the amplifier system; determining a second voltage of a second node of the fully-differential input system, wherein the second node is coupled at the second node to a plurality of second resistors in a second star configuration, each resistor of the plurality of second resistors corresponding to a respective resistor of the plurality of first resistors, and wherein the plurality of second resistors comprises: a second input resistor corresponding to the first input resistor and coupled between the second node and a second input of the amplifier system; a second common mode resistor corresponding to the first common mode resistor and coupled between the second node and the common mode voltage node; a second feedback resistor corresponding to the first feedback resistor and coupled between the second node and a second output node of the amplifier system; trimming a plurality of individual resistances of the plurality of first resistors and a plurality of individual resistances of the plurality of second resistors in order to maintain a difference of a first voltage at the first node and a second voltage at the second node at a constant level; trimming one or both of the first input resistor and the second input resistor such that a first ratio of a resistance of the first feedback resistor to a resistance of the second feedback resistor is approximately equal to a second ratio of the first input resistor to a resistance of the second input resistor; and trimming one or both of the first common mode resistor and the second common mode resistor such that the first ratio is approximately equal to a third ratio of the first common mode resistor to a resistance of the second common mode resistor.

2 . The method of claim 1 , further comprising:
decoupling the first common mode resistor from the first node and the second common mode resistor from the second node prior to and during trimming of one or both of the first input resistor and the second input resistor; recoupling the first common mode resistor to the first node and the second common mode resistor to the second node prior to and during trimming of one or both of the first common mode resistor and the second common mode resistor.

3 . The method of claim 2 , wherein:
decoupling the first common mode resistor from the first node comprises deactivating a first switch coupled between the first common mode resistor and the first node; and decoupling the second common mode resistor from the second node comprises deactivating a second switch coupled between the second common mode resistor and the second node.

4 . The method of claim 2 , wherein:
decoupling the first common mode resistor from the first node comprises activating an impedance element coupled between the common mode voltage node and the first node; and decoupling the second common mode resistor from the second node comprises activating the impedance element or a second impedance element coupled between the common mode voltage node and the second node.

5 . The method of claim 1 , further comprising:
decoupling the first input resistor from the first node and the second input resistor from the second node prior to and during trimming of one or both of the first common mode resistor and the second common mode resistor; recoupling the first input resistor to the first node and the second input resistor to the second node prior to and during trimming of one or both of the first common mode resistor and the second common mode resistor.

6 . The method of claim 5 , wherein:
decoupling the first input resistor from the first node comprises deactivating a first switch coupled between the first input resistor and the first node; and decoupling the second input resistor from the second node comprises deactivating a second switch coupled between the second input resistor and the second node.

7 . A system for calibrating a fully-differential input system, comprising:
a first input for receiving a first voltage of a first node of the fully-differential input system, wherein the first node is coupled at the first node to a plurality of first resistors in a first star configuration, and wherein the plurality of first resistors comprises: a first input resistor coupled between the first node and a first input of the amplifier system; a first common mode resistor coupled between the first node and a common mode voltage node of the amplifier system; and a first feedback resistor coupled between the first node and a first output node of the amplifier system; a second input for receiving a second voltage of a second node of the fully-differential input system, wherein the second node is coupled at the second node to a plurality of second resistors in a second star configuration, each resistor of the plurality of second resistors corresponding to a respective resistor of the plurality of first resistors, and wherein the plurality of second resistors comprises: a second input resistor corresponding to the first input resistor and coupled between the second node and a second input of the amplifier system; a second common mode resistor corresponding to the first common mode resistor and coupled between the second node and the common mode voltage node; a second feedback resistor corresponding to the first feedback resistor and coupled between the second node and a second output node of the amplifier system; and a calibration system configured to: trim a plurality of individual resistances of the plurality of first resistors and a plurality of individual resistances of the plurality of second resistors in order to maintain a difference of a first voltage at the first node and a second voltage at the second node at a constant level; trim one or both of the first input resistor and the second input resistor such that a first ratio of a resistance of the first feedback resistor to a resistance of the second feedback resistor is approximately equal to a second ratio of the first input resistor to a resistance of the second input resistor; and trim one or both of the first common mode resistor and the second common mode resistor such that the first ratio is approximately equal to a third ratio of the first common mode resistor to a resistance of the second common mode resistor.

8 . The system of claim 7 , wherein the calibration system is further configured to:
decouple the first common mode resistor from the first node and the second common mode resistor from the second node prior to and during trimming of one or both of the first input resistor and the second input resistor; recouple the first common mode resistor to the first node and the second common mode resistor to the second node prior to and during trimming of one or both of the first common mode resistor and the second common mode resistor.

9 . The system of claim 8 , wherein:
decoupling the first common mode resistor from the first node comprises deactivating a first switch coupled between the first common mode resistor and the first node; and decoupling the second common mode resistor from the second node comprises deactivating a second switch cou

Assignees

• Cirrus Logic Int Semiconductor Ltd
• Cirrus Logic Inc

Inventors

• He Zhaohui
• Pramanik Neel
• Zhang Lingli
• Xu Wei
• Drakshapalli Prashanth

Classifications

• H03F2203/45048

  Calibrating and standardising a dif amp · CPC title

• H03F2203/7231

  the gated amplifier being switched on or off by putting into cascade or not, by choosing between amplifiers by one or more switch(es) · CPC title

• H03F3/183

  with semiconductor devices only · CPC title

• H03F2200/462

  the current being sensed · CPC title

• H03G2201/106

  being attenuating element · CPC title