Device, method and system to provide epitaxial structures opposite sides of a separation layer between channel stacks

Patent metadata

Field	Value
Publication number	US-12550381-B2
Application number	US-202217856891-A
Country	US
Kind code	B2
Filing date	Jul 1, 2022
Priority date	Jul 1, 2022
Publication date	Feb 10, 2026
Grant date	Feb 10, 2026

Abstract

Techniques and mechanisms for providing epitaxial structures of an integrated circuit (IC). In an embodiment, an IC comprises a separation layer, and first and second channel stack structures at opposite surfaces of the separation layer. A first source or drain (SD) structure extends to the first channel stack structure, and a second SD structure extends to the second channel stack structure. A hole extends through the separation layer, wherein the first and second SD structures are formed concurrently by a deposition of an epitaxial (epi) material from one side of the hole. An insulator material of the separation layer facilitates separation of the first and second SD structures from each other during the epi deposition. In another embodiment, respective crystal orientations in the first and second SD structures each face the same direction along a vertical dimension which is orthogonal to the surfaces of the separation layer.

First claim

What is claimed is:

1 . An integrated circuit (IC) comprising:
a separation layer comprising a first surface in a first horizontal plane and a second surface which is opposite the first surface in a second horizontal plane, wherein the separation layer forms a first hole structure that extends to each of the first surface and the second surface; a first channel stack structure which is vertically above the first surface, the first channel stack structure comprising a first plurality of channel structures; a first source or drain (SD) structure comprising a first portion of a first epitaxial material in contact with each of the first plurality of channel structures; a second channel stack structure which is vertically below the second surface, the second channel stack structure comprising a second plurality of channel structures; a second SD structure comprising a second portion of the first epitaxial material in contact with each of the second plurality of channel structures; a first conductive contact structure which is electrically coupled at the first SD structure; and a second conductive contact structure which is electrically coupled at the second SD structure;
wherein:
the first hole structure extends into a first region which is between the first SD structure and the second SD structure;
a portion of the first conductive contact structure is vertically above both the first SD structure and the first surface; and
a portion of the second conductive contact structure is vertically below both the second SD structure and the second surface.

2 . The IC of claim 1 , wherein the separation layer further forms a second hole structure that extends to each of the first surface and the second surface, the IC further comprising:
a third SD structure comprising a second epitaxial material, wherein the first plurality of channel structures each extend to the third SD structure; and a fourth SD structure comprising the second epitaxial material, wherein the second plurality of channel structures each extend to the fourth SD structure;
wherein the second hole structure extends into a second region which is between the third SD structure and the fourth SD structure.

3 . The IC of claim 1 , wherein:
a first vertical extent of the first SD structure above a first channel structure of the first channel stack structure is substantially greater than a second vertical extent of the first SD structure below a second channel structure of the first channel stack structure; the first channel structure is a furthest channel of the first channel stack structure from the separation layer; and the second channel structure is a closest channel of the first channel stack structure to the separation layer.

4 . The IC of claim 3 , wherein:
a third vertical extent of the second SD structure above a third channel structure of the second channel stack structure is substantially greater than a fourth vertical extent of the second SD structure below a fourth channel structure of the second channel stack structure; the third channel structure is a closest channel of the second channel stack structure to the separation layer; and the fourth channel structure is a furthest channel of the second channel stack structure from the separation layer.

5 . The IC of claim 4 , wherein the separation layer further forms a second hole structure that extends to each of the first surface and the second surface, the IC further comprising:
a third SD structure comprising a second epitaxial material, wherein the first plurality of channel structures each extend to the third SD structure; and a fourth SD structure comprising the second epitaxial material, wherein the second plurality of channel structures each extend to the fourth SD structure;
wherein the second hole structure extends into a second region which is between the third SD structure and the fourth SD structure.

6 . The IC of claim 5 , wherein a fifth vertical extent of the third SD structure above the first channel structure is substantially greater than a sixth vertical extent of the third SD structure below the second channel structure.

7 . The IC of claim 6 , wherein a seventh vertical extent of the fourth SD structure above the third channel structure is substantially greater than an eighth vertical extent of the fourth SD structure below the fourth channel structure.

8 . The IC of claim 1 , wherein:
a first crystal orientation of the first epitaxial material in the first SD structure, and a second crystal orientation of the first epitaxial material in the second SD structure, each face a first direction along a dimension which extends perpendicularly to the first surface.

9 . The IC of claim 8 , wherein:
the separation layer further forms a second hole structure that extends to each of the first surface and the second surface; the IC further comprises:
a third SD structure comprising a second epitaxial material, wherein the first plurality of channel structures each extend to the third SD structure; and
a fourth SD structure comprising the second epitaxial material, wherein the second plurality of channel structures each extend to the fourth SD structure;
the second hole structure extends into a second region which is between the third SD structure and the fourth SD structure; and a third crystal orientation of the second epitaxial material in the third SD structure, and a fourth crystal orientation of the second epitaxial material in the fourth SD structure, each face the first direction along the dimension.

10 . The IC of claim 1 , wherein:
the separation layer is a layer of an insulator material which forms each of the first surface, the second surface, and the first hole structure; the IC further comprises:
a first gate electrode structure which extends around each of the first plurality of channel structures;
a second gate electrode structure which extends around each of the second plurality of channel structures;
a bottom side of the first gate electrode structure adjoins the first surface; and a top side of the second gate electrode structure adjoins the second surface.

11 . A system comprising:
a substrate; a power supply; and an integrated circuit (IC) die attached to the substrate and coupled to the power supply, the IC die comprising:
a separation layer comprising a first surface in a first horizontal plane and a second surface which is opposite the first surface in a second horizontal plane, wherein the separation layer forms a first hole structure that extends to each of the first surface and the second surface;
a first channel stack structure which is vertically above the first surface, the first channel stack structure comprising a first plurality of channel structures;
a first source or drain (SD) structure comprising a first portion of a first epitaxial material in contact with each of the first plurality of channel structures;
a second channel stack structure which is vertically below the second surface, the second channel stack structure comprising a second plurality of channel structures;
a second SD structure comprising a second portion of the first epitaxial material in contact with each of the second plurality of channel structures;
a first conductive contact structure which is electrically coupled at the first SD structure; and
a second conductive contact structure which is electrically coupled at the second SD structure;

wherein:
the first hole structure extends into a first region which is between the first SD structure and the second SD structure;
a portion of the first conductive contact structure is vertically above both the first SD

Assignees

• Intel Corp

Inventors

• Sharma Abhishek
• Murthy Anand
• Ghani Tahir
• Gomes Wilfred

Classifications

• H10D88/00 Primary

  Three-dimensional [3D] integrated devices · CPC title

• H10D84/83

  of only insulated-gate FETs [IGFET] · CPC title

• H10D62/121

  oriented parallel to substrates · CPC title

• H10D30/6735

  having gates fully surrounding the channels, e.g. gate-all-around · CPC title

• H10D30/6757 Primary

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title