Semiconductor device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-12543340-B2
Application number	US-202117639910-A
Country	US
Kind code	B2
Filing date	Dec 31, 2021
Priority date	Dec 31, 2021
Publication date	Feb 3, 2026
Grant date	Feb 3, 2026

Abstract

A semiconductor device includes a first and a second nitride-based semiconductor layers, a gate electrode, and a doped nitride-based semiconductor layer. The doped nitride-based semiconductor layer is disposed between the second nitride-based semiconductor layer and the gate electrode. The doped nitride-based semiconductor layer has a pair of opposite ledge portions free from coverage of the gate electrode and a central portion therebetween. The second nitride-based semiconductor layer has a first portion beneath the central portion and a second portion beneath the ledge portion, and the second nitride-based semiconductor layer has a doping concentration of a dopant that selected from a highly electronegative group, in which the doping concentration from the first portion to the second portion increases.

First claim

The invention claimed is:

1 . A semiconductor device, comprising:
a first nitride-based semiconductor layer; a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a bandgap greater than a bandgap of the first nitride-based semiconductor layer; a gate electrode disposed above the second nitride-based semiconductor layer; and a doped nitride-based semiconductor layer disposed between the second nitride-based semiconductor layer and the gate electrode, the doped nitride-based semiconductor layer having a pair of opposite ledge portions free from coverage of the gate electrode and a central portion therebetween, wherein the second nitride-based semiconductor layer has a first portion beneath the central portion and a pair of opposite second portions beneath the corresponding ledge portion of the pair of ledge portions, and the second nitride-based semiconductor layer has a doping concentration of a dopant that selected from a highly electronegative group, wherein the doping concentration from the first portion to the pair of opposite second portions increases; wherein a first dielectric layer disposed on the gate electrode; and a second dielectric layer covers the first dielectric layer and the pair of opposite ledge portions of the doped nitride-based semiconductor layer, and two opposite side surfaces of the doped nitride-based semiconductor layer are free from coverage by the second dielectric layer.

2 . The semiconductor device of claim 1 , wherein the increase of the doping concentration of the second nitride-based semiconductor layer is continuous.

3 . The semiconductor device of claim 1 , wherein the doping concentration of the first portion of the second nitride-based semiconductor layer is zero.

4 . The semiconductor device of claim 1 , wherein the second nitride-based semiconductor layer has a third portion abutting against the second portion, and the doping concentration of the third portion is less than that of the second portion of the second nitride-based semiconductor layer.

5 . The semiconductor device of claim 4 , wherein the doping concentration of the third portion of the second nitride-based semiconductor layer is zero at a top surface thereof.

6 . The semiconductor device of claim 4 , wherein the doped nitride-based semiconductor layer has a side surface extending upward from an interface between the second and third portions of the second nitride-based semiconductor layer.

7 . The semiconductor device of claim 1 , wherein each of the ledge portions of the doped nitride-based semiconductor layer is doped to have a doping concentration of the dopant less than that of the second portion of the second nitride-based semiconductor layer.

8 . The semiconductor device of claim 1 , wherein the doping concentration of the second portion of the second nitride-based semiconductor layer remains constant along a thickness direction thereof.

9 . The semiconductor device of claim 1 , further comprising:
the first dielectric layer having a pair of opposite side surfaces which connect two opposite side surfaces of the gate electrode, respectively.

10 . The semiconductor device of claim 9 , further comprising:
the second dielectric layer disposed on the doped nitride-based semiconductor layer and covering the side surfaces of the gate electrode.

Assignees

• Innoscience Suzhou Technology Holding Co Ltd

Inventors

• Du Ziming
• Li Changan
• Du Weixing
• You Jheng-Sheng

Classifications

• H10D64/258

  characterised by the relative positions of the source or drain electrodes with respect to the gate electrode · CPC title

• H10D64/111

  Field plates · CPC title

• H10D62/854

  further characterised by the dopants · CPC title

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title

• H10D30/015

  of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT · CPC title