System and method for performance-based multiple namespace resource allocation in a memory
US-2020104056-A1 · Apr 2, 2020 · US
US12541300B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12541300-B2 |
| Application number | US-202217689049-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 8, 2022 |
| Priority date | Sep 10, 2021 |
| Publication date | Feb 3, 2026 |
| Grant date | Feb 3, 2026 |
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A computational storage device is provided. The computation storage device includes: a nonvolatile memory configured to store data; and a storage controller configured to control a plurality of applications to be executed based on the data. The storage controller includes: a processor; and a memory including a program slot configured to store a user program. The processor is configured to drive an operating system to execute the user program to control an application among the plurality of applications to perform a first operation on the data based on an event signal.
Opening claim text (preview).
What is claimed is: 1 . A computational storage device comprising: a nonvolatile memory configured to store data; and a storage controller configured to perform a storage function and to control a plurality of applications to be executed based on the data, wherein the storage function comprises writing data, reading data, and managing storage space of the nonvolatile memory, wherein the storage controller comprises: a processor; and a memory comprising a program slot configured to store a user program, wherein the processor is configured to drive an operating system to execute the user program to control an application among the plurality of applications to perform a first operation for a plurality of logical block addresses based on an event signal, wherein the plurality of logical block addresses comprises logical block addresses that are less than a logical block address corresponding to a logical block address parameter, and wherein the application is different from programs that perform the storage function of the storage controller. 2 . The computational storage device of claim 1 , wherein the user program is stored in the program slot based on an external command. 3 . The computational storage device of claim 2 , wherein the user program is stored in the program slot as an extended Berkeley Packet Filter (eBPF). 4 . The computational storage device of claim 1 , wherein the processor is further configured to drive the operating system to control the application to issue an internal command for the first operation. 5 . The computational storage device of claim 1 , wherein the processor is further configured to control an event handler to identify the application according to an execution condition corresponding to the first operation, the execution condition comprising the logical block address parameter. 6 . The computational storage device of claim 5 , wherein the event handler is executed by the processor through the operating system. 7 . The computational storage device of claim 1 , wherein the first operation comprises a garbage collection operation, and wherein the processor is further configured to identify the logical block addresses that are less than the logical block address corresponding to the logical block address parameter as the plurality of logical block addresses the garbage collection operation is performed on, and to skip the garbage collection operation for logical block addresses that exceed the logical block address corresponding to the logical block address parameter. 8 . The computational storage device of claim 1 , wherein the memory is configured to store file data input from the outside, and the user program is executed based on the file data. 9 . The computational storage device of claim 8 , wherein the memory comprises a computational program memory configured to store the file data and an internal memory configured to store the program slot. 10 . A computational storage device comprising: a nonvolatile memory configured to store data; a storage controller configured to perform a storage function and to control a plurality of applications to be executed based on the data, wherein the storage function comprises writing data, reading data, and managing storage space of the nonvolatile memory; and a processor configured to reconfigure an event handler according to an external command, control the event handler to identify an application among the plurality of applications according to an execution condition included in the external command and comprising a logical block address parameter, and execute the application for a plurality of logical block addresses filtered based on the logical block address parameter, wherein the plurality of logical block addresses comprises logical block addresses that are less than a logical block address corresponding to the logical block address parameter, wherein the storage controller is further configured to reconfigure the processor according to the external command, and wherein the application is different from programs that perform the storage function of the storage controller. 11 . The computational storage device of claim 10 , wherein the processor is provided in the storage controller, and is further configured to drive an operating system to execute the application through the operating system. 12 . The computational storage device of claim 11 , wherein the storage controller further comprises a memory which comprises a program slot configured to store a user program executed by the operating system, and the processor is further configured to drive the operating system to execute the user program to control the application according to the execution condition. 13 . The computational storage device of claim 12 , wherein the user program is stored in the program slot based on the external command. 14 . The computational storage device of claim 13 , wherein the external command comprises a first external command for the user program and a second external command for the execution condition. 15 . The computational storage device of claim 10 , wherein the processor is further configured to identify the logical block addresses that are less than the logical block address corresponding to the logical block address parameter as the plurality of logical block addresses the application is performed on, and to skip the application for logical block addresses that exceed the logical block address corresponding to the logical block address parameter. 16 . An electronic system comprising: a nonvolatile memory configured to store data; a storage controller which is configured to perform a storage function and comprises a processor and a memory comprising a program slot configured to store a user program executed by an internal operating system, wherein the storage function comprises writing data, reading data, and managing storage space of the nonvolatile memory; and a host device configured to provide a download command for the user program to the storage controller, wherein the internal operating system is configured to store the user program in the program slot based on the download command, execute the user program to control an application among a plurality of applications to perform a first operation on the data for a plurality of logical block addresses filtered based on a logical block address parameter, wherein the plurality of logical block addresses comprises logical block addresses that are less than a logical block address corresponding to the logical block address parameter, and wherein the application is different from programs that perform the storage function of the storage controller. 17 . The electronic system of claim 16 , wherein the host device is configured to provide an execution command, which comprises an execution condition for the first operation, to the storage controller after providing the download command, and the processor is further configured to control an event handler to identify the application from among the plurality of applications according to the execution condition, and wherein the execution condition comprises the logical block address parameter. 18 . The electronic system of claim 17 , wherein the event handler is executed by the processor through the internal operating system. 19 . The electronic system of claim 16 , wherein the user program is stored in the program slot as an extended Berkeley Packet Filter (eBPF). 20 . The electronic system of claim
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