Signal processing apparatus, signal processing method, and recording medium

Patent metadata

Field	Value
Publication number	US-12531573-B2
Application number	US-202418658328-A
Country	US
Kind code	B2
Filing date	May 8, 2024
Priority date	May 18, 2023
Publication date	Jan 20, 2026
Grant date	Jan 20, 2026

Abstract

A processing apparatus includes: a distribution unit that divides an input signal into input signal blocks, and distributes, in dividing order, the divided input signal blocks to delta-sigma modulation circuits; a parallel circuit unit including the delta-sigma modulation circuits that perform delta-sigma modulation on the input signal blocks and output output signal blocks; and a coupling unit that couples the output signal blocks outputted from the parallel circuit unit, thereby to generate an output signal such that a first output signal block reflects a result obtained from a first delta-sigma modulation circuit, which performs delta-sigma modulation on a first input signal block corresponding to the first output signal block, performing delta-sigma modulation on the first input signal block, and a state of a second delta-sigma modulation circuit that performs delta-sigma modulation on a second input signal block located immediately before or after the first input signal block.

First claim

What is claimed is:

1 . A signal processing apparatus that generates an output signal from an input signal, the signal processing apparatus comprising:
a signal distributor unit that divides the input signal into a plurality of input signal blocks, each having a predetermined data length, and that distributes, in dividing order, the plurality of divided input signal blocks to a plurality of delta-sigma modulation circuits; a modulator including the plurality of delta-sigma modulation circuits that perform delta-sigma modulation on the plurality of input signal blocks and that output a plurality of output signal blocks; and a signal coupler that couples the plurality of output signal blocks outputted from the modulator, thereby to generate an output signal, wherein the signal processing apparatus generates the output signal such that a first output signal block included in the output signal reflects a result obtained from a first delta-sigma modulation circuit, which performs delta-sigma modulation on a first input signal block corresponding to the first output signal block included in the output signal, performing delta-sigma modulation on the first input signal block, and a state of a second delta-sigma modulation circuit that performs delta-sigma modulation on a second input signal block located immediately before or after the first input signal block.

2 . The signal processing apparatus according to claim 1 , wherein
the signal distributer adds, to an end of the second input signal block, overlap data having a predetermined first length from a beginning of the first input signal block located immediately after the second input signal block, and distributes the second input signal block to which the overlap data is added, to the second delta-sigma modulation circuit, and the signal coupler calculates at least a part of the first output signal block, on the basis of a result obtained from the first delta-sigma modulation circuit performing delta-sigma modulation on the overlap data of the first input signal block, and a result obtained from the second delta-sigma modulation circuit performing delta-sigma modulation on the overlap data added to the second input signal block, thereby to generate the output signal including the first output signal block that reflects the state of the second delta-sigma modulation circuit.

3 . The signal processing apparatus according to claim 2 , wherein the signal coupler calculates, as at least a part of the first output signal block, an average value of the result obtained from the first delta-sigma modulation circuit performing delta-sigma modulation on the overlap data and the result obtained from the second delta-sigma modulation circuit performing delta-sigma modulation on the overlap data.

4 . The signal processing apparatus according to claim 1 , wherein
the modulator controls a state of the first delta-sigma modulation circuit such that the state of the first delta-sigma modulation circuit that performs delta-sigma modulation on a signal block part having a predetermined second length from an end of the first input signal block, is brought closer to an initial state of the second delta-sigma modulation circuit that perform delta-sigma modulation on the second input signal block, and the signal coupler generates the output signal including the first output signal block that is generated by the first delta-sigma modulation circuit whose state is controlled by the modulator performing delta-sigma modulation on the first input signal block, thereby to generate the output signal including the first output signal block that reflects the state of the second delta-sigma modulation circuit.

5 . The signal processing apparatus according to claim 4 , wherein the first delta-sigma modulation circuit controls the state of the first delta-sigma modulation circuit by changing a gain for controlling a magnitude of a feedback signal that is fed back in the first delta-sigma modulation circuit.

6 . A signal processing method that generates an output signal from an input signal, the signal processing method comprising:
dividing the input signal into a plurality of input signal blocks, each having a predetermined data length; distributing, in dividing order, the plurality of divided input signal blocks to a plurality of delta-sigma modulation circuits that perform delta-sigma modulation on the plurality of input signal blocks and that output a plurality of output signal blocks; and coupling the plurality of output signal blocks outputted, thereby to generate an output signal, wherein the signal processing method generates the output signal such that a first output signal block included in the output signal reflects a result obtained from a first delta-sigma modulation circuit, which performs delta-sigma modulation on a first input signal block corresponding to the first output signal block, performing delta-sigma modulation on the first input signal block, and a state of a second delta-sigma modulation circuit that performs delta-sigma modulation on a second input signal block located immediately before or after the first input signal block.

7 . The signal processing method according to claim 6 , wherein
the dividing the input signal includes adding, to an end of the second input signal block, overlap data having a predetermined first length from a beginning of the first input signal block located immediately after the second input signal block, and distributing the second input signal block to which the overlap data is added, to the second delta-sigma modulation circuit, and the coupling the plurality of output signal blocks includes calculating at least a part of the first output signal block, on the basis of a result obtained from the first delta-sigma modulation circuit performing delta-sigma modulation on the overlap data of the first input signal block, and a result obtained from the second delta-sigma modulation circuit performing delta-sigma modulation on the overlap data added to the second input signal block, thereby to generate the output signal including the first output signal block that reflects the state of the second delta-sigma modulation circuit.

8 . The signal processing method according to claim 7 , wherein the calculating at least a part of the first output signal block includes calculating, as at least a part of the first output signal block, an average value of the result obtained from the first delta-sigma modulation circuit performing delta-sigma modulation on the overlap data and the result obtained from the second delta-sigma modulation circuit performing delta-sigma modulation on the overlap data.

9 . The signal processing method according to claim 6 further comprising controlling a state of the first delta-sigma modulation circuit such that the state of the first delta-sigma modulation circuit that performs delta-sigma modulation on a signal block part having a predetermined second length from an end of the first input signal block, is brought closer to an initial state of the second delta-sigma modulation circuit that perform delta-sigma modulation on the second input signal block, and
coupling the plurality of output signal blocks includes generating the output signal including the first output signal block that is generated by the first delta-sigma modulation circuit whose state is controlled performing delta-sigma modulation on the first input signal block, thereby to generate the output signal including the first output signal block that reflects the state of the second delta-sigma modulation circuit.

10 . The signal processing method according to claim 9 , wherein the first delta-sigma modulation circuit controls the state o

Assignees

• Nec Corp

Inventors

• Ogasahara Daisaku
• Tanio Masaaki

Classifications

• H03M3/484

  by adapting the gain of the feedback signal, e.g. by adapting the reference values of the digital/analogue converter in the feedback path · CPC title

• H03M3/37

  Compensation or reduction of delay or phase error · CPC title

• H03M3/50

  Digital/analogue converters using delta-sigma modulation as an intermediate step (digital delta-sigma modulators per se H03M7/3004) · CPC title

• H03M3/30 Primary

  Delta-sigma modulation · CPC title