Backplane and glass-based circuit board

US12525568B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12525568-B2
Application numberUS-202418648939-A
CountryUS
Kind codeB2
Filing dateApr 29, 2024
Priority dateSep 30, 2019
Publication dateJan 13, 2026
Grant dateJan 13, 2026

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A backplane and a glass-based circuit board. The backplane includes: a base substrate and a plurality of light-emitting units, arranged in an array on the base substrate. Each of the light-emitting units includes at least one light-emitting sub-unit; the light-emitting sub-unit includes a connection line and a plurality of light-emitting diode chips connected with the connection line, and the light-emitting diode chips are located on a side of the connection line away from the base substrate. The connection line includes a first connection portion, a second connection portion and a third connection portion; in each of the light-emitting sub-units, the third connection portion includes a plurality of connection sub-portions, each of the connection sub-portions includes at least one electrical contact point; the electrical contact points at adjacent ends of adjacent connection sub-portions constitute an electrical contact point pair.

First claim

Opening claim text (preview).

The invention claimed is: 1 . A backplane, comprising: a base substrate; a plurality of light-emitting units, arranged in an array on the base substrate, wherein each of the plurality of the light-emitting units comprises at least one light-emitting sub-unit; the at least one light-emitting sub-unit comprises a connection line and a plurality of light-emitting diode chips electrically connected with the connection line; the plurality of the light-emitting diode chips are located on a side of the connection line away from the base substrate; in each of the light-emitting sub-units, the connection line comprises a first connection portion, a second connection portion and a third connection portion; in each of the light-emitting sub-units, the third connection portion comprises a plurality of connection sub-portions, each of the connection sub-portions comprise at least one electrical contact point; the electrical contact points at adjacent ends of adjacent connection sub-portions constitute an electrical contact point pair, wherein the plurality of the connection sub-portions comprise a first connection sub-portion and a second connection sub-portion, the first connection sub-portion comprises a rectangular central portion as well as a first edge portion and a second edge portion respectively located on both sides of a first central line of the rectangular central portion, and along an extension direction of the first connection sub-portion, sizes of the first edge portion and the second edge portion are both smaller than a size of the central portion, the first connection sub-portion extends along a first direction parallel to the base substrate; the first connection sub-portion comprises a connection region, an orthographic projection of a part of the first sub-portion where the connection region on the base substrate is located forms a shape of notch, and the electrical contact point of the first connection sub-portion is located on a side of the connection region facing the notch. 2 . The backplane according to claim 1 , wherein the electrical contact point of the second connection sub-portion and the electrical contact point of an adjacent first connection sub-portion located in the connection region constitute the electrical contact point pair. 3 . The backplane according to claim 2 , wherein, in each of the light-emitting sub-units, the first connection portion comprises a first input end; the second connection portion comprises a second input end; and the first connection portion and the second connection portion respectively comprise an electrical contact point, both ends of the third connection portion respectively comprise an electrical contact point; the electrical contact point at one end of the third connection portion and the electrical contact point of the first connection portion constitute an electrical contact point pair; the electrical contact point at the other end of the third connection portion and the electrical contact point of the second connection portion constitute an electrical contact point pair. 4 . The backplane according to claim 3 , wherein the light-emitting sub-unit comprises a plurality of first connection sub-portion rows extending along a first direction and arranged in a second direction, the first direction intersect with the second direction; each of the first connection sub-portion rows comprises at least one first connection sub-portion; two end portions of the second connection sub-portion are respectively located in notches opposite to each other at end portions of adjacent first connection sub-portion rows, so that the adjacent first connection sub-portion rows are connected with each other by the second connection sub-portion and the light-emitting diode chips. 5 . The backplane according to claim 4 , wherein, except the connection regions located at both ends of the first connection sub-portion row, the first connection sub-portion row has a substantially equal size in the second direction at respective positions in the first direction. 6 . The backplane according to claim 4 , wherein the first connection portion comprises a first protrusion portion; the first protrusion portion is located within the notch at the connection region of the first connection sub-portion row connected with the first protrusion portion by the light-emitting diode chip; the second connection portion comprises a second protrusion portion; and the second protrusion portion is located within the notch at the connection region of the first connection sub-portion row connected with the second protrusion portion by the light-emitting diode chip. 7 . The backplane according to claim 4 , wherein each of the first connection sub-portion rows comprises a plurality of the first connection sub-portions; and a connection region of one first connection sub-portion of adjacent first connection sub-portions is located in the notch of the other first connection sub-portion of the adjacent first connection sub-portions, so that the adjacent connection regions are electrically connected by the light-emitting diode chip. 8 . The backplane according to claim 5 , wherein each of the first connection sub-portion rows comprises a first end portion and a second end portion; the first end portions of the plurality of the connection sub-portion rows are aligned in the first direction or the second direction; the second end portions of the plurality of the first connection sub-portion rows are aligned in the first direction or the second direction. 9 . The backplane according to claim 8 , wherein the plurality of the first connection sub-portion rows and the second connection sub-portions are integrally connected in a square wave shape. 10 . The backplane according to claim 4 , wherein the second connection sub-portions connected with a same first connection sub-portion row by the light-emitting diode chips are respectively located on both sides of the same first connection sub-portion row in the second direction and are respectively located at both ends of the same first connection sub-portion row in the first direction. 11 . The backplane according to claim 1 , wherein each of the electrical contact point pairs is respectively connected with an anode and a cathode of one of the plurality of the light-emitting diode chips in one-to-one correspondence, the two connection portions constituting the electrical contact point pair have a space therebetween, and an orthogonal projection of the light-emitting diode chip on the base substrate at least partially overlaps with an orthogonal projection of the space on the base substrate. 12 . The backplane according to claim 1 , wherein the at least one light-emitting sub-unit comprises a plurality of light-emitting sub-units; and the plurality of the light-emitting sub-units of each of the light-emitting units share the first connection portion and the second connection portion, so that the plurality of the light-emitting sub-units are connected in parallel. 13 . The backplane according to claim 1 , further comprising: a reflective layer, located between the connection line and the light-emitting diode chip; a plurality of wirings parallel to each other, located on a side of the connection line facing the base substrate, and including a plurality of first wirings and a plurality of second wirings; a first insulation layer between the plurality of the wirings parallel to each other and the connection line, a second insulation layer between the reflective layer and the connection line, to isolate the reflective layer and the connection line from each other, a white glue layer on a side of the reflecti

Assignees

Inventors

Classifications

  • Top-view layouts, e.g. mirror arrays · CPC title

  • H10W90/00Primary

    Package configurations · CPC title

  • Interconnections or connectors in packages · CPC title

  • H10W72/50Primary

    Bond wires · CPC title

  • Details of lamp holders, terminals or connectors · CPC title

Patent family

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Frequently asked questions

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What does patent US12525568B2 cover?
A backplane and a glass-based circuit board. The backplane includes: a base substrate and a plurality of light-emitting units, arranged in an array on the base substrate. Each of the light-emitting units includes at least one light-emitting sub-unit; the light-emitting sub-unit includes a connection line and a plurality of light-emitting diode chips connected with the connection line, and the l…
Who is the assignee on this patent?
Beijing Boe Display Tech Co, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 13 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).