Display panel and display apparatus

Patent metadata

Field	Value
Publication number	US-12525183-B2
Application number	US-202218262322-A
Country	US
Kind code	B2
Filing date	Jun 1, 2022
Priority date	Jun 1, 2022
Publication date	Jan 13, 2026
Grant date	Jan 13, 2026

Abstract

A display panel includes a first pixel driving circuit and a second pixel driving circuit. A data writing transistor and a driving transistor in the first pixel driving circuit, a driving transistor and a data writing transistor in the second pixel driving circuit are sequentially arranged. In the first pixel driving circuit, a first electrode plate of a capacitor is coupled to the driving transistor at a first coupling position and coupled to a first light-emitting device at a second coupling position located at a side of the first coupling position away from the data writing transistor. In the second pixel driving circuit, a first electrode plate of a capacitor is coupled to the driving transistor at a third coupling position and coupled to a second light-emitting device at a fourth coupling position located between the third coupling position and the data writing transistor.

First claim

What is claimed is:

1 . A display panel, comprising:
a data line; a first light-emitting device and a second light-emitting device; and a first pixel driving circuit and a second pixel driving circuit each including a capacitor, a driving transistor and a data writing transistor; the data writing transistor being coupled to the data line and the driving transistor, and the capacitor including a first electrode plate and a second electrode plate, wherein the data writing transistor in the first pixel driving circuit, the driving transistor in the first pixel driving circuit, the driving transistor in the second pixel driving circuit and the data writing transistor in the second pixel driving circuit are sequentially arranged along an extending direction of the data line; the first electrode plate in the first pixel driving circuit is coupled to the driving transistor in the first pixel driving circuit at a first coupling position, and is coupled to the first light-emitting device at a second coupling position; the second coupling position is located at a side of the first coupling position away from the data writing transistor in the first pixel driving circuit; and the first electrode plate in the second pixel driving circuit is coupled to the driving transistor in the second pixel driving circuit at a third coupling position, and is coupled to the second light-emitting device at a fourth coupling position; the fourth coupling position is located between the third coupling position and the data writing transistor in the second pixel driving circuit.

2 . The display panel according to claim 1 , wherein
the driving transistor includes an active layer, and the active layer of the driving transistor includes a plurality of semiconductor segments that are sequentially distributed along the extending direction of the data line and coupled to each other, and an extending direction of a semiconductor segment in the plurality of semiconductor segments intersects the extending direction of the data line; the second coupling position is located at a side of a plurality of semiconductor segments in the first pixel driving circuit away from the first coupling position; and the fourth coupling position is located at a side of a plurality of semiconductor segments in the second pixel driving circuit proximate to the third coupling position.

3 . The display panel according to claim 1 , further comprising:
a first transfer pattern; a first insulating layer located between the first transfer pattern and the first electrode plate in the first pixel driving circuit, the first insulating layer having a first through hole located at the second coupling position; and a second insulating layer located between the first transfer pattern and the first light-emitting device, the second insulating layer having a second through hole located at the second coupling position; wherein the first transfer pattern is coupled to the first electrode plate in the first pixel driving circuit at the first through hole, and is coupled to the first light-emitting device at the second through hole; the first through hole and the second through hole are staggered in a thickness direction of the display panel.

4 . The display panel according to claim 3 , further comprising:
a second transfer pattern; wherein the first insulating layer is also located between the second transfer pattern and the first electrode plate in the second pixel driving circuit, and the first insulating layer further has a third through hole located at the fourth coupling position; the second insulating layer is also located between the second transfer pattern and the second light-emitting device, and the second insulating layer further has a fourth through hole located at the fourth coupling position; the second transfer pattern is coupled to the first electrode plate in the second pixel driving circuit at the third through hole, and is coupled to the second light-emitting device at the fourth through hole; and the third through hole and the fourth through hole are staggered in the thickness direction of the display panel.

5 . The display panel according to claim 4 , wherein
a line connecting centers of the first through hole and the second through hole intersects a line connecting centers of the third through hole and the fourth through hole.

6 . The display panel according to claim 4 , wherein
the first transfer pattern and the second transfer pattern each are substantially in a shape of a rectangle; and the first through hole and the second through hole are sequentially arranged along a long side of the first transfer pattern, and the third through hole and the fourth through hole are sequentially arranged along a long side of the second transfer pattern.

7 . The display panel according to claim 6 , wherein
the long side of the first transfer pattern is substantially parallel to the extending direction of the data line, and the long side of the second transfer pattern intersects the extending direction of the data line.

8 . The display panel according to claim 4 , wherein
in the extending direction of the data line, a distance between the second through hole and the fourth through hole is substantially equal to a pixel dimension of the display panel.

9 . The display panel according to claim 1 , wherein
the first electrode plate in the first pixel driving circuit and the first electrode plate in the second pixel driving circuit have different shapes, and an overlapping area between the first electrode plate and the second electrode plate in the first pixel driving circuit is equal to an overlapping area between the first electrode plate and the second electrode plate in the second pixel driving circuit.

10 . The display panel according to claim 9 , wherein
the second electrode plate in the first pixel driving circuit and the second electrode plate in the second pixel driving circuit have different shapes.

11 . The display panel according to claim 1 , wherein
a gate of the data writing transistor in each of the first pixel driving circuit and the second pixel driving circuit includes two first sub-gates coupled to each other, the data writing transistor has a first groove, and the first groove separates the two first sub-gates; and an opening of the first groove in the first pixel driving circuit and an opening of the first groove in the second pixel driving circuit face each other.

12 . The display panel according to claim 1 , wherein
the driving transistor in each of the first pixel driving circuit and the second pixel driving circuit includes: a gate, a first electrode and a second electrode; the second electrode of the driving transistor is coupled to the first electrode plate in a same pixel driving circuit: the first pixel driving circuit and the second pixel driving circuit each further include a reference signal transistor, and the reference signal transistor includes: a gate, a first electrode and a second electrode; the first electrode of the reference signal transistor is configured such that a reference signal is written into the first electrode of the reference signal transistor, and the second electrode of the reference signal transistor is coupled to the second electrode plate and the gate of the driving transistor in a same pixel driving circuit; and in the same pixel driving circuit, the reference signal transistor is located at a side of the data writing transistor away from the driving transistor.

13 . The display panel according to claim 12 , further comprising:
a reference signal connection line located at a side of the reference signal t

Assignees

• Hefei Boe Joint Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Yuan Zhidong
• Li Yongqian
• Yuan Can
• Wu Liu

Classifications

• G09G3/3258

  with pixel circuitry controlling the voltage across the light-emitting element · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G3/32 Primary

  semiconductive, e.g. using light-emitting diodes [LED] · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title