Super-junction device

Patent metadata

Field	Value
Publication number	US-12520541-B2
Application number	US-202318176547-A
Country	US
Kind code	B2
Filing date	Mar 1, 2023
Priority date	Mar 1, 2022
Publication date	Jan 6, 2026
Grant date	Jan 6, 2026

Abstract

Disclosed is a super-junction device, comprising a semiconductor substrate and a super-junction structure on a first surface of the semiconductor substrate. The super-junction structure includes first semiconductor pillars and second semiconductor pillars. The super-junction device has a cell region and a terminal region surrounding the cell region, the super-junction structure has a portion located in the cell region, and another portion located in the terminal region. The super-junction device further includes a guard ring located in the terminal region and surrounding the cell region, the guard ring includes doped regions extending segmentally and top-end portions of a first set of semiconductor pillars connecting the doped regions into a continuous ring. The top-end portions of the first set of semiconductor pillars in the guard ring are undoped, thus improving impurity distribution of the guard ring, charge balance in the terminal region, and voltage withstand performance of the super-junction device.

First claim

What is claimed is:

1 . A super-junction device, comprising:
a semiconductor substrate; and a super-junction structure, which is located on a first surface of the semiconductor substrate, and comprises a plurality of first semiconductor pillars and a plurality of second semiconductor pillars, wherein the plurality of first semiconductor pillars and the plurality of second semiconductor pillars are alternately arranged on the first surface, each one of the plurality of first semiconductor pillars, which is adjacent to a corresponding one of the plurality of second semiconductor pillars, is in contact with that corresponding one of the plurality of second semiconductor pillars and form a PN junction with that corresponding one of the plurality of second semiconductor pillars, a dopant type of the plurality of first semiconductor pillars is opposite to a dopant type of the plurality of second semiconductor pillars, wherein the super-junction device has a cell region and a terminal region surrounding the cell region, a portion of the super-junction structure is located in the cell region and another portion of the super-junction structure is located in the terminal region, the super-junction device further comprises a guard ring which is located in the terminal region and surrounds the cell region, the guard ring comprises a plurality of doped regions extending segmentally, and top-end portions of a first set of semiconductor pillars which connect the plurality of doped regions into a continuous ring, wherein the guard ring is in direct contact with a terminal electrode located in the terminal region.

2 . The super-junction device according to claim 1 , wherein the plurality of doped regions are located at top-end portions of a second set of semiconductor pillars, respectively, and adjacent doped regions of the plurality of doped regions are both in contact with a corresponding one of the first set of semiconductor pillars.

3 . The super-junction device according to claim 2 , wherein the first set of semiconductor pillars are selected from the plurality of first semiconductor pillars, and the second set of semiconductor pillars are selected from the plurality of second semiconductor pillars.

4 . The super-junction device according to claim 3 , wherein the plurality of first semiconductor pillars and the plurality of second semi-conductor pillars each extend in parallel along a first direction and are alternately arranged in a second direction.

5 . The super-junction device according to claim 4 , wherein a width of the guard ring in the first direction corresponds to a doped-region length, along the first direction, of a corresponding one of the plurality of doped regions.

6 . The super-junction device according to claim 4 , wherein a width of the guard ring in the second direction corresponds to a sum of a doped-region width of a corresponding one of the plurality of doped regions in the second direction and widths of corresponding semiconductor pillars of the plurality of first semiconductor pillars that are in contact with that corresponding one of the plurality of doped regions.

7 . The super-junction device according to claim 2 , wherein, in the cell region, the super-junction device further includes a body region located at top of a corresponding one of the plurality of first semiconductor pillars, and a source region located in the body region.

8 . The super-junction device according to claim 7 , wherein a junction depth of the plurality of doped regions is consistent with a junction depth of the body region.

9 . The super-junction device according to claim 7 , wherein the semiconductor substrate, the plurality of second semiconductor pillars, and the source region are respectively of a first dopant type, and the plurality of first semiconductor pillars, the body region, and the plurality of doping regions are respectively of a second dopant type.

10 . The super-junction device according to claim 9 , wherein the first dopant type is N type and the second dopant type is P type.

11 . The super-junction device according to claim 2 , wherein the guard ring comprises a plurality of sub-rings, each of which comprises: a plurality of doped regions extending segmentally, and a top-end portion of a semiconductor pillar in the first set of semiconductor pillars which connects the plurality of doped regions into a continuous ring.

12 . The super-junction device according to claim 11 , wherein the plurality of sub-rings are separated from each other by undoped regions of the second set of semiconductor pillars.

13 . The super-junction device according to claim 12 , wherein a spacing between adjacent ones of the plurality of sub-rings increases correspondingly with a distance from the adjacent ones of the plurality of sub-rings to an edge of the cell region.

14 . The super-junction device according to claim 1 , wherein in the guard ring: the top-end portions of the first set of semiconductor pillars are each at least partially presented from being doped by an implantation process for forming the plurality of doped regions, thus a dopant concentration in the top-end portions of the first set of semiconductor pillars are each exhibit a decreasing gradient from an edge in contact to an adjacent one of the plurality of doped regions toward a central region farther away from that adjacent one of the plurality of doped regions.

15 . The super-junction device according to claim 1 , wherein in the terminal region, the terminal electrode is electrically is connected to a corresponding one of the plurality of doped regions in the guard ring via a conductive channel penetrating through an interlayer dielectric layer, which has a bottom surface in direct contact with an upper surface of the guard ring, and the terminal electrode is different from a source electrode of the super-junction device.

Assignees

• Hangzhou Silicon Magic Semiconductor Tech Co Ltd
• Silicon Magic Semiconductor Tech Hangzhou Co Ltd

Inventors

• Wang Jiakun
• Li Lvqiang
• Chen Hui

Classifications

• H10D64/117

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title

• H10D62/157

  Impurity concentrations or distributions · CPC title

• H10D62/127

  of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs · CPC title

• H10D62/107

  Buried supplementary regions, e.g. buried guard rings  (multi-RESURF H10D62/111) · CPC title

• H10D30/665

  having edge termination structures · CPC title