Electrical contact arrangement, power semiconductor module, method for manufacturing an electrical contact arrangement and method for manufacturing a power semiconductor module

Patent metadata

Field	Value
Publication number	US-12512413-B2
Application number	US-202118026953-A
Country	US
Kind code	B2
Filing date	Nov 23, 2021
Priority date	Nov 23, 2020
Publication date	Dec 30, 2025
Grant date	Dec 30, 2025

Abstract

An electrical contact arrangement electrically contacts at least two power semiconductor devices, and comprises at least two bond wires and at least three electrical contacts, comprising an alternating current contact, a positive direct current contact, and a negative direct current contact. Each electrical contact comprises a ground potential part; contact part; and insulation part on the ground potential part. The contact part is provided on the insulation part. At least two electrical contacts are separated by a gap between the insulation parts and the gap between the contact parts of the separated electrical contacts. A bond wire connects a first power semiconductor device on a contact part of the positive direct current contact with a contact part of the alternating current contact. A bond wire connects a second power semiconductor device on the contact part of the alternating current contact with a contact part of the negative direct current contact.

First claim

The invention claimed is:

1 . An electrical contact arrangement for electrically contacting at least two power semiconductor devices of a power semiconductor module,
the electrical contact arrangement comprising at least two bond wires and at least three electrical contacts, comprising an alternating current contact, a positive direct current contact, and a negative direct current contact, wherein each of the electrical contacts comprises
a ground potential part;
a contact part; and
an insulation part for electrically insulating the ground potential part from the contact part,
wherein the insulation part is provided on the ground potential part; and the contact part is provided on the insulation part, wherein at least two of the at least three electrical contacts are separated by having a gap between the insulation parts of the at least two separated electrical contacts and by having the gap between the contact parts of the at least two separated electrical contacts; and wherein at least one first bond wire connects a first power semiconductor device arranged on a contact part of the positive direct current contact with a contact part of the alternating current contact, and at least one second bond wire connects a second power semiconductor device arranged on the contact part of the alternating current contact with a contact part of the negative direct current contact.

2 . The electrical contact arrangement according to claim 1 ,
wherein each one of the at least two separated electrical contacts comprises a separate substrate, each separate substrate comprising the ground potential part, the contact part, and the insulation part of the respective electrical contact; and wherein the at least two separate substrates are arranged on a common baseplate.

3 . The electrical contact arrangement according to claim 1 , wherein the at least one first bond wire directly connects the first power semiconductor device arranged on the contact part of the positive direct current contact with the contact part of the alternating current contact, and/or the at least one second bond wire directly connects the second power semiconductor device arranged on the contact part of the alternating current contact with the contact part of the negative direct current contact.

4 . The electrical contact arrangement according to claim 1 , wherein the insulation parts of any electrical contacts are positioned with the gap between each other and the contact parts of any electrical contacts are positioned with the gap between each other.

5 . The electrical contact arrangement according to claim 1 ,
wherein the ground potential parts of the at least two separated electrical contacts are positioned with the gap between each other, or wherein the ground potential parts of any electrical contacts are positioned with the gap between each other.

6 . The electrical contact arrangement according to claim 1 , comprising at least five electrical contacts further comprising at least one of a gate contact, and an auxiliary circuit contact.

7 . The electrical contact arrangement according to claim 6 ,
wherein at least one of the at least three or the at least five electrical contacts is provided on another of the at least three or the at least five electrical contacts; or wherein one of the at least three or the at least five electrical contacts is provided on one other of the at least three or the at least five electrical contacts; or wherein the negative direct current contact is provided on the alternating current contact; or wherein the negative direct current contact is provided on the contact part of the alternating current contact or on the insulation part of the alternating current contact.

8 . The electrical contact arrangement according to claim 6 , comprising at least one electrical contact in form of a gate contact with a contact part in form of a gate contact part for contacting a gate of the at least one semiconductor device, wherein the gate contact part is provided on the insulation part of another electrical contact.

9 . The electrical contact arrangement according to claim 1 ,
wherein the contact parts comprise at least one metallization area; or wherein the contact parts are made of at least one metallization area; wherein the electrical contacts are positioned relative to each other to provide that the metallization areas of the electrical contacts are operable with a voltage potential difference of equal or more than 100 V; or wherein two adjacent electrical contacts are positioned with the gap between the electrical contacts to provide that the metallization areas of the two adjacent electrical contacts are operable with a voltage potential difference of equal or more than 100 V; and/or wherein the contact parts of different separated electrical contacts are separated to ensure that the separated contact parts are provided on separate insulation part, such that the at least one metallization area is free of insulation gaps.

10 . The electrical contact arrangement according to claim 1 ,
wherein the insulation part comprises or is made of a ceramic insulation material; or wherein the insulation part comprises, is made of/by or is part of at least one of: direct-bonded copper substrate, an active metal brazing substrate, a direct bonded aluminum substrate, an insulated metal substrate, or a flexfoil technology.

11 . The electrical contact arrangement according to claim 1 ,
wherein the insulation part and the contact part are designed with a path length for electrically insulating and/or separating the ground potential part from the contact part of equal or more than 1 mm or equal or more than 3 mm, or wherein the insulation part and the contact part are designed to provide a contact part free border of an edge of the insulation part having a path length for electrically insulating and/or separating the ground potential part from the contact part of equal or more than 1 mm.

12 . The electrical contact arrangement according to claim 1 , wherein the insulation part and the contact part are designed to provide a migration path between the ground potential part and the contact part extending in at least two directions being perpendicular to each other.

13 . A power semiconductor module, comprising the electrical contact arrangement according to claim 1 .

14 . The power semiconductor module of claim 13 , comprising:
multiple power semiconductor devices, comprising high side power semiconductor devices and low side power semiconductor devices; an alternating current contact with one or more contact parts; a positive direct current contact with one or more contact parts; a negative direct current contact with one or more contact parts; and two gate contacts with corresponding gate contact parts; wherein each of the contact parts is arranged on a separate insulation part; the high side power semiconductor devices are arranged on a first substrate that is connected via bond wires to a contact part of the positive direct current contact; gate lines of the high side power semiconductor devices are arranged on a second substrate that is connected via bond wires to a third substrate; the low side power semiconductor devices are arranged on the third substrate that is connected via bond wires to a contact part of the alternating direct current contact; gate lines of low side power semiconductor devices are arranged on a fourth substrate that is connected via bond wires to a contact part of the negative direct current contact; and the first to fourth substrates are spaced from one another.

Assignees

• Hitachi Energy Ltd

Inventors

• Schuderer Juergen
• Mohn Fabian
• Liu Chunlei
• Puukko Joonas

Classifications

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W40/255

  having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title

• H10W90/401

  characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

• H10W72/5475

  multiple bond wires connected to common bond pads at both ends of the wires · CPC title