Bipolar junction transistor with lateral and vertical conducting paths

Patent metadata

Field	Value
Publication number	US-12507485-B2
Application number	US-202318209281-A
Country	US
Kind code	B2
Filing date	Jun 13, 2023
Priority date	Jun 13, 2023
Publication date	Dec 23, 2025
Grant date	Dec 23, 2025

Abstract

A bipolar junction transistor is provided, including a semiconductor substrate and a doped layer of a first conductivity type, a doped well region of a second conductivity type formed in the doped layer, a first, second heavily doped region of the second conductivity type, and a third, fourth and fifth heavily doped region of the first conductivity type in the doped well region. The fifth heavily doped region is coupled with a first pin. The third and fourth heavily doped regions are coupled with a second pin. A sixth and seventh heavily doped region of the first conductivity type are disposed in the doped layer. The sixth and first heavily doped regions are connected in common. The seventh and second heavily doped regions are connected in common. When applying either a positive or negative surged mode, the bipolar junction transistor is formed, having both lateral and vertical conducting paths.

First claim

What is claimed is:

1 . A bipolar junction transistor with lateral and vertical conducting paths, comprising:
a semiconductor substrate of a first conductivity type; a doped layer of the first conductivity type, which is formed on the semiconductor substrate; a doped well region of a second conductivity type, which is formed in the doped layer of the first conductivity type, and the second conductivity type is opposite to the first conductivity type, wherein a first heavily doped region of the second conductivity type, a second heavily doped region of the second conductivity type, a third heavily doped region of the first conductivity type, a fourth heavily doped region of the first conductivity type and a fifth heavily doped region of the first conductivity type are further disposed in the doped well region of the second conductivity type, the fifth heavily doped region of the first conductivity type is electrically coupled with a first pin, the third heavily doped region of the first conductivity type and the fourth heavily doped region of the first conductivity type are electrically connected in common and coupled with a second pin, the first heavily doped region of the second conductivity type and the second heavily doped region of the second conductivity type are spaced apart by the third heavily doped region of the first conductivity type, the fourth heavily doped region of the first conductivity type and the fifth heavily doped region of the first conductivity type; and a sixth heavily doped region of the first conductivity type and a seventh heavily doped region of the first conductivity type, being disposed in the doped layer of the first conductivity type, wherein the sixth heavily doped region of the first conductivity type and the seventh heavily doped region of the first conductivity type are spaced apart by the doped well region of the second conductivity type, and the sixth heavily doped region of the first conductivity type is electrically connected with the first heavily doped region of the second conductivity type, and the seventh heavily doped region of the first conductivity type is electrically connected with the second heavily doped region of the second conductivity type.

2 . The bipolar junction transistor with lateral and vertical conducting paths according to claim 1 , wherein when the first conductivity type is N type and the second conductivity type is P type, the first pin and the second pin are electrically coupled to a positive voltage level and a ground voltage level, respectively so as to provide a positive surged operating mode.

3 . The bipolar junction transistor with lateral and vertical conducting paths according to claim 2 , wherein when the positive surged operating mode is applied, the bipolar junction transistor having a lateral conducting path is formed, and the lateral conducting path comprises at least one lateral n-p-n bipolar junction transistor structure.

4 . The bipolar junction transistor with lateral and vertical conducting paths according to claim 3 , wherein the at least one lateral n-p-n bipolar junction transistor structure is constructed from the fifth heavily doped region of the first conductivity type, the doped well region of the second conductivity type to the third heavily doped region of the first conductivity type, and from the fifth heavily doped region of the first conductivity type, the doped well region of the second conductivity type to the fourth heavily doped region of the first conductivity type.

5 . The bipolar junction transistor with lateral and vertical conducting paths according to claim 2 , wherein when the positive surged operating mode is applied, the bipolar junction transistor having a vertical conducting path is formed, and the vertical conducting path comprises at least one vertical n-p-n bipolar junction transistor structure and at least one forward diode connected in series with the vertical n-p-n bipolar junction transistor structure.

6 . The bipolar junction transistor with lateral and vertical conducting paths according to claim 5 , wherein the at least one vertical n-p-n bipolar junction transistor structure is constructed from the fifth heavily doped region of the first conductivity type, the doped well region of the second conductivity type, the doped layer of the first conductivity type to the sixth heavily doped region of the first conductivity type, and from the fifth heavily doped region of the first conductivity type, the doped well region of the second conductivity type, the doped layer of the first conductivity type to the seventh heavily doped region of the first conductivity type.

7 . The bipolar junction transistor with lateral and vertical conducting paths according to claim 5 , wherein the at least one forward diode is constructed from the sixth heavily doped region of the first conductivity type, the first heavily doped region of the second conductivity type, the doped well region of the second conductivity type to the third heavily doped region of the first conductivity type, and from the seventh heavily doped region of the first conductivity type, the second heavily doped region of the second conductivity type, the doped well region of the second conductivity type to the fourth heavily doped region of the first conductivity type.

8 . The bipolar junction transistor with lateral and vertical conducting paths according to claim 1 , wherein when the first conductivity type is N type and the second conductivity type is P type, the first pin and the second pin are electrically coupled to a negative voltage level and a ground voltage level, respectively so as to provide a negative surged operating mode.

9 . The bipolar junction transistor with lateral and vertical conducting paths according to claim 8 , wherein when the negative surged operating mode is applied, the bipolar junction transistor having a lateral conducting path is formed, and the lateral conducting path comprises at least one lateral n-p-n bipolar junction transistor structure.

10 . The bipolar junction transistor with lateral and vertical conducting paths according to claim 9 , wherein the at least one lateral n-p-n bipolar junction transistor structure is constructed from the third heavily doped region of the first conductivity type, the doped well region of the second conductivity type to the fifth heavily doped region of the first conductivity type, and from the fourth heavily doped region of the first conductivity type, the doped well region of the second conductivity type to the fifth heavily doped region of the first conductivity type.

11 . The bipolar junction transistor with lateral and vertical conducting paths according to claim 1 , further comprising an eighth heavily doped region of the second conductivity type and a ninth heavily doped region of the second conductivity type, being disposed in the doped layer of the first conductivity type, wherein the eighth heavily doped region of the second conductivity type, the ninth heavily doped region of the second conductivity type, the third heavily doped region of the first conductivity type, and the fourth heavily doped region of the first conductivity type are electrically connected in common and coupled with the second pin.

12 . The bipolar junction transistor with lateral and vertical conducting paths according to claim 11 , wherein when the first conductivity type is N type and the second conductivity type is P type, the first pin and the second pin are electrically coupled to a positive voltage level and a ground voltage level, respectively so as to provide a positive surged operating mode.

13 . The bipolar junction transistor wit

Assignees

• Amazing Microelectronic Corp

Inventors

• Huang Sung-Chih
• Yeh Chih-Ting
• Chuang Che-Hao

Classifications

• H10W20/20

  Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title

• H10D10/60

  Lateral BJTs · CPC title

• H10D62/124

  Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions · CPC title

• H10D62/10

  Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies · CPC title

• H10D89/60 Primary

  Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] · CPC title