Display substrate and display device

US12507480B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12507480-B2
Application numberUS-202218023425-A
CountryUS
Kind codeB2
Filing dateFeb 24, 2022
Priority dateFeb 24, 2022
Publication dateDec 23, 2025
Grant dateDec 23, 2025

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display substrate and a display device are provided. The display substrate includes: a base substrate, a display area, and a frame area arranged on a first side of the display area; the display area includes a central display area, a first display area and a second display area; the display substrate includes a plurality of first data lines, a plurality of second data lines; the first data signal lead includes a first lead portion extending along a first direction, and the second data signal lead includes a second lead portion extending along a second direction; a line width of the first lead portion is smaller than a line width of the second lead portion; the extension direction of the first data line and the extension direction of the second data line are a third direction.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display substrate, comprising a display area, and a frame area arranged on a first side of the display area; wherein the display area includes a central display area, a first display area arranged on a second side of the central display area, and a second display area arranged on a third side of the central display area; the second side is opposite to the third side; the display substrate includes a plurality of first data lines arranged in the central display area, a plurality of second data lines arranged in the first display area and the second display area, and a plurality of first data signal leads and a plurality of second data signal leads arranged in the frame area; the first data signal lead is coupled to the first data line, and the second data signal lead is coupled to the second data line; the first data signal lead includes a first lead portion extending along a first direction, and the second data signal lead includes a second lead portion extending along a second direction; a line width of the first lead portion is smaller than a line width of the second lead portion; an extension direction of the first data line and an extension direction of the second data line are a third direction, the first direction intersects the third direction, and the second direction intersects the third direction; there is a first angle between the first direction and the third direction, and there is a second angle between the second direction and the third direction. 2 . The display substrate according to claim 1 , wherein the line width of the first lead portion is greater than or equal to 1.0 um and less than or equal to 2.0 um, and the line width of the second lead portion is greater than or equal to 1.5 um and less than or equal to 3.0 um; the second data signal lead further includes a third lead portion extending along a fourth direction; a line width of the third lead portion is greater than the line width of the second lead portion. 3 . The display substrate according to claim 2 , wherein the line width of the third lead portion is greater than or equal to 1.8 um and less than or equal to 4.0 um; the second data signal lead includes a fourth lead portion extending along a third direction; a line width of the fourth lead portion is greater than the line width of the second lead portion. 4 . The display substrate according to claim 3 , wherein the line width of the fourth lead portion is greater than or equal to 3 um and less than or equal to 13 um; the frame area includes a first fan-out area and a second fan-out area arranged along a direction away from the display area; a line width of the second lead portion in the first fan-out area is smaller than a line width of the second lead portion in the second fan-out area. 5 . The display substrate according to claim 4 , wherein the first angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees, and the second angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees. 6 . The display substrate according to claim 2 , wherein the first angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees, and the second angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees. 7 . The display substrate according to claim 3 , wherein the first angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees, and the second angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees. 8 . The display substrate according to claim 1 , wherein the frame area comprises a first fan-out area and a second fan-out area arranged in a direction away from the display area; and the first data signal lead include a serpentine lead portion; the serpentine lead portion includes a plurality of first lead portions extending along a third direction, and a plurality of second lead portions extending along a fifth direction; the first lead portions and the second lead portions are arranged alternately, adjacent first lead portion and the second lead portion are coupled to each other. 9 . The display substrate according to claim 8 , wherein a shortest distance between two adjacent second lead portions included in a same serpentine lead portion is greater than or equal to 2.4 um and less than or equal to 3 um; a shortest distance between adjacent two serpentine lead portions is greater than or equal to 1.0 um and less than or equal to 2 um, and the line width of the first lead portion and the line width of the second lead portion are both greater than or equal to 1.8 um and less than or equal to 2.4 um. 10 . The display substrate according to claim 9 , wherein the first angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees, and the second angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees. 11 . The display substrate according to claim 8 , wherein the first angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees, and the second angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees. 12 . The display substrate according to claim 1 , wherein the frame area includes a first fan-out area and a second fan-out area arranged along a direction away from the display area; in the first fan-out area, a sum of the line width of the first lead portion and a shortest distance between two adjacent first lead portions is equal to a sum of the line width of the second lead portion and a shortest distance between two adjacent second lead portions; in the second fan-out area, the sum of the line width of the first lead portion and the shortest distance between two adjacent first lead portions is equal to the sum of the line width of the second lead portion and the shortest distance between two adjacent second lead portions. 13 . The display substrate according to claim 12 , wherein the shortest distance between two adjacent first lead portions is greater than or equal to 1.0 um and less than or equal to 2.0 um; the shortest distance between two adjacent second lead portions is greater than or equal to 0.5 um and less than or equal to 1.0 um. 14 . The display substrate according to claim 1 , wherein the first angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees, and the second angle is greater than 0 degrees and less than 89.5 degrees, or greater than 90.5 degrees and less than 180 degrees. 15 . The display substrate according to claim 1 , wherein the frame area comprises a fan-out area, the fan-out area includes a first fan-out area and a second fan-out area arranged in a direction away from the display area; the display substrate includes a base substrate, and a first metal layer and a second metal layer stacked along a direction away from the base substrate; a lead portion included in the first data signal lead and arranged in the fan-out area is included in the first metal layer or the second metal layer; a lead portion included in the second data signal lead and arranged in the fan-out area is included in the first metal layer or the second metal layer; lead portions included in adjacent data signal leads and arranged in the f

Assignees

Inventors

Classifications

  • H10D86/443Primary

    adapted for preventing breakage, peeling or short circuiting · CPC title

  • H10D86/60Primary

    wherein the TFTs are in active matrices · CPC title

  • Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates · CPC title

  • Active matrix addressed cells {(G02F1/134336, G02F1/134363 take precedence)} · CPC title

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What does patent US12507480B2 cover?
A display substrate and a display device are provided. The display substrate includes: a base substrate, a display area, and a frame area arranged on a first side of the display area; the display area includes a central display area, a first display area and a second display area; the display substrate includes a plurality of first data lines, a plurality of second data lines; the first data si…
Who is the assignee on this patent?
Chengdu Boe Optoelect Tech Co, Boe Technology Group Co Ltd, Beijing Boe Technology Dev Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D86/443. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 23 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).