Configurable multi-domain multi-phase disaggregated voltage regulator

Patent metadata

Field	Value
Publication number	US-12504775-B2
Application number	US-202117386912-A
Country	US
Kind code	B2
Filing date	Jul 28, 2021
Priority date	Jul 28, 2021
Publication date	Dec 23, 2025
Grant date	Dec 23, 2025

Abstract

A microelectronic assembly is disclosed, comprising a first integrated circuit (IC) die having electrical load circuits, first control circuits, and a second control circuit, a second IC die having powertrain (PTR) phase circuits electrically coupled to the first IC die, and inductors in a package substrate electrically coupled to the first IC die and the second IC die within a package. Individual ones of the first control circuits regulates power to a corresponding one of the electrical load circuits. The second control circuit maps the first control circuits and the PTR phase circuits. The PTR phase circuits control power to the inductors. The first control circuits, the second control circuit, the PTR phase circuits and the inductors together function as a voltage regulator configured to receive power from the package substrate at a first voltage and deliver power to the electrical load circuits at a second voltage.

First claim

The invention claimed is:

1 . A microelectronic assembly, comprising:
a first integrated circuit (IC) die having one or more electrical load circuits, first control circuits, and a second control circuit; a second IC die having one or more powertrain (PTR) phase circuits electrically coupled to the first IC die; and one or more inductors in a package substrate electrically coupled to the first IC die and to the second IC die within a package, wherein:
the first IC die is coupled to a first side of the second IC die with die-to-die (DTD) interconnects,
the second IC die is coupled to the package substrate with die-to-package substrate (DTPS) interconnects on a second side opposite to the first side,
the first control circuits regulate power to corresponding electrical load circuits,
the second control circuit maps the first control circuits and the one or more PTR phase circuits,
the one or more PTR phase circuits control power to the one or more inductors, and
the first control circuits, the second control circuit, the one or more PTR phase circuits and the one or more inductors operate together as a voltage regulator (VR) configured to receive power from the package substrate at a first voltage and to deliver power to the electrical load circuits at a second voltage, the first voltage being higher than the second voltage.

2 . The microelectronic assembly of claim 1 , wherein the one or more PTR phase circuits are configured to operate at the first voltage.

3 . The microelectronic assembly of claim 2 , wherein the second IC die further comprises a common block circuit configured to operate at the second voltage.

4 . The microelectronic assembly of claim 3 , wherein the common block circuit in the second IC die is configured to:
generate signals when catastrophic faults are detected in the PTR phase circuits, and send the signals to the second control circuit on the first IC die.

5 . The microelectronic assembly of claim 1 , wherein the second control circuit maps individual ones of the first control circuits to one or more of the PTR phase circuits.

6 . The microelectronic assembly of claim 1 , wherein:
the electrical load circuits are ganged together with a common ganging current, and the corresponding first control circuits are connected together.

7 . A microelectronic assembly, comprising:
a first integrated circuit (IC) die comprising electrical load circuits, first control circuits, and a second control circuit; a second IC die conductively coupled with the first IC die, wherein the second IC die comprises one or more drive and power stage circuits; and a package substrate conductively coupled with the first IC die and the second IC die, wherein the package substrate comprises one or more inductors, and wherein:
the first IC die is coupled to a first side of the second IC die with die-to-die (DTD) interconnects,
the second IC die is coupled to the package substrate with die-to-package substrate (DTPS) interconnects on a second side opposite to the first side,
the first control circuits regulate power to corresponding electrical load circuits,
the second control circuit maps the first control circuits and the one or more drive and power stage circuits,
the one or more drive and power stage circuits control power to the one or more inductors, and
the first control circuits, the second control circuit, the one or more drive and power stage circuits, and the one or more inductors are to operate together as a voltage regulator (VR) configured to receive power from the package substrate at a first voltage and to deliver power to the electrical load circuits at a second voltage, wherein the first voltage is higher than the second voltage.

8 . The microelectronic assembly of claim 7 , further comprising:
one or more conductive pillars between the first IC die and the package substrate, wherein the one or more inductors are coupled with the first IC die via the one or more conductive pillars.

9 . The microelectronic assembly of claim 8 , further comprising:
a mold compound at least partially around the second IC die, wherein the one or more conductive pillars extend through the mold compound.

10 . The microelectronic assembly of claim 8 , further comprising:
an interposer, between the package substrate and the first IC die, wherein the one or more conductive pillars extend through the interposer.

11 . The microelectronic assembly of claim 7 , wherein:
the second IC die comprises one or more conductive vias between the package substrate and the first IC die, and the one or more inductors are coupled with first IC die via the one or more conductive vias.

12 . The microelectronic assembly of claim 7 , wherein:
the one or more drive and power stage circuits are configured to operate at the first voltage.

13 . The microelectronic assembly of claim 12 , wherein:
the second IC die further comprises a circuit configured to operate at the second voltage.

14 . The microelectronic assembly of claim 13 , wherein the circuit configured to operate at the second voltage is to:
generate a signal in response to detection of a catastrophic fault in the one or more drive and power stage circuits, and send the signal to the second control circuit.

15 . The microelectronic assembly of claim 7 , wherein the second control circuit is to map individual ones of the first control circuits to one or more of the drive and power stage circuits.

16 . The microelectronic assembly of claim 7 , wherein:
the electrical load circuits are ganged together with a common ganging current, and corresponding first control circuits are connected together.

17 . A microelectronic assembly, comprising:
a first integrated circuit (IC) die having one or more electrical load circuits, first control circuits, and a second control circuit; a second IC die having one or more powertrain (PTR) phase circuits, wherein the second IC die is electrically coupled to the first IC die; and one or more inductors in a package substrate electrically coupled to the first IC die and to the second IC die within a package, wherein:
the first control circuits regulate power to corresponding electrical load circuits,
the second control circuit maps the first control circuits and the one or more PTR phase circuits,
the one or more PTR phase circuits control power to the one or more inductors, and
the first control circuits, the second control circuit, the one or more PTR phase circuits and the one or more inductors operate together as a voltage regulator (VR) configured to receive power from the package substrate at a first voltage and to deliver power to the electrical load circuits at a second voltage, the first voltage being higher than the second voltage,
the one or more PTR phase circuits are configured to operate at the first voltage, and
the second IC die comprises a common block circuit configured to operate at the second voltage, wherein the common block circuit is to generate a signal in response to detection of a catastrophic fault in the one or more PTR phase circuits and send the signal to the second control circuit.

18 . The microelectronic assembly of claim 17 , wherein:
the first IC die is coupled to a first side of the second IC die with die-to-die (DTD) interconnects, and the second IC die is coupled to the package substrate with die-to-package substrate (DTPS) interconnects on a second side opposite to the first side.

19 . The microelectronic assembly of claim 17 , wherein:
the f

Assignees

• Intel Corp

Inventors

• Salus Tamir
• Schaef Christopher
• Lyakhov Alex

Classifications

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• G05F1/56 Primary

  using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title