Thin film transistor substrate and display device comprising the same

Patent metadata

Field	Value
Publication number	US-12501664-B2
Application number	US-202217901192-A
Country	US
Kind code	B2
Filing date	Sep 1, 2022
Priority date	Sep 3, 2021
Publication date	Dec 16, 2025
Grant date	Dec 16, 2025

Abstract

A thin film transistor substrate and a display device comprising the same are provided, in which the thin film transistor substrate comprises a first thin film transistor and a second thin film transistor on a base substrate, wherein the first thin film transistor includes a first active layer on the base substrate, and a first gate electrode spaced apart from the first active layer, the second thin film transistor includes a second active layer on the base substrate, a second gate electrode spaced apart from the second active layer, and an auxiliary gate electrode between the second active layer and the second gate electrode, the first active layer and the second active layer are integrally formed and connected to each other, the auxiliary gate electrode is integrally formed with the first gate electrode and spaced apart from the second active layer and the second gate electrode, and the second gate electrode overlaps at least a portion of the auxiliary gate electrode.

First claim

The invention claimed is:

1 . A thin film transistor substrate comprising:
a first thin film transistor and a second thin film transistor on a base substrate, the first thin film transistor including: a first active layer on the base substrate; and a first gate electrode spaced apart from the first active layer, the second thin film transistor including: a second active layer on the base substrate; a second gate electrode spaced apart from the second active layer; and an auxiliary gate electrode between the second active layer and the second gate electrode, wherein the first active layer and the second active layer are integrally formed and connected to each other, wherein the auxiliary gate electrode is integrally formed and connected to the first gate electrode and spaced apart from the second active layer and the second gate electrode, wherein the second gate electrode overlaps at least a portion of the auxiliary gate electrode, wherein the second active layer includes:
a channel portion;
a first connection portion that is in contact with one side of the channel portion; and
a second connection portion that is in contact with other side of the channel portion, and
wherein a portion of the channel portion overlaps the auxiliary gate electrode, and other portion of the channel portion does not overlap the auxiliary gate electrode.

2 . The thin film transistor substrate of claim 1 , wherein a same voltage as that of the first gate electrode is applied to the auxiliary gate electrode.

3 . The thin film transistor substrate of claim 1 , wherein the first thin film transistor is configured to be turned on when the second thin film transistor is turned on.

4 . The thin film transistor substrate of claim 1 , wherein a first gate voltage is applied to the first gate electrode when a second gate voltage is applied to the second gate electrode.

5 . The thin film transistor substrate of claim 1 , wherein the other portion of the channel portion, which does not overlap the auxiliary gate electrode, overlaps the second gate electrode.

6 . The thin film transistor substrate of claim 1 , wherein a portion of the channel portion, which is toward the first connection portion, overlaps the auxiliary gate electrode and does not overlap the second gate electrode.

7 . The thin film transistor substrate of claim 1 , wherein a portion of the channel portion, which is toward the second connection portion, overlaps the auxiliary gate electrode and does not overlap the second gate electrode.

8 . The thin film transistor substrate of claim 1 , wherein the first active layer and the second active layer include at least one of an IGZO(InGaZnO)-based oxide semiconductor material, an IZO(InZnO)-based oxide semiconductor material, an IGZTO(InGaZnSnO)-based oxide semiconductor material, an ITZO(InSnZnO)-based oxide semiconductor material, a FIZO(FeInZnO)-based oxide semiconductor material, a ZnO-based oxide semiconductor material, a SIZO(SiInZnO)-based oxide semiconductor material, a ZnON(Zn-Oxynitride)-based oxide semiconductor material, a GZO(GaZnO)-based oxide semiconductor material, an IGO(InGaO)-based oxide semiconductor material, or a GZTO(GaZnSnO)-based oxide semiconductor material.

9 . The thin film transistor substrate of claim 1 , wherein each of the first active layer and the second active layer includes:
a first oxide semiconductor layer; and a second oxide semiconductor layer on the first oxide semiconductor layer.

10 . The thin film transistor substrate of claim 1 , further comprising:
a first light shielding layer on the base substrate; and a second light shielding layer on the first light shielding layer, wherein the first light shielding layer and the second light shielding layer are spaced apart from each other and overlap each other, wherein one of the first light shielding layer and the second light shielding layer is coupled to the second active layer, and the other one of the first light shielding layer and the second light shielding layer is coupled to the second gate electrode.

11 . The thin film transistor substrate of claim 10 , wherein the first light shielding layer and the second light shielding layer form a capacitor.

12 . A display device comprising:
a thin film transistor substrate, the thin film transistor substrate including a first thin film transistor and a second thin film transistor on a base substrate, the first thin film transistor including: a first active layer on the base substrate; and a first gate electrode spaced apart from the first active layer, the second thin film transistor including: a second active layer on the base substrate; a second gate electrode spaced apart from the second active layer; and an auxiliary gate electrode between the second active layer and the second gate electrode, wherein the first active layer and the second active layer are integrally formed and connected to each other, wherein the auxiliary gate electrode is integrally formed with the first gate electrode and spaced apart from the second active layer and the second gate electrode, wherein the second gate electrode overlaps at least a portion of the auxiliary gate electrode, wherein the second active layer includes:
a channel portion;
a first connection portion that is in contact with one side of the channel portion; and
a second connection portion that is in contact with other side of the channel portion, and
wherein a portion of the channel portion overlaps the auxiliary gate electrode, and other portion of the channel portion does not overlap the auxiliary gate electrode.

13 . The display device of claim 12 , wherein the first thin film transistor is a light emitting control transistor, and the second thin film transistor is a driving transistor.

14 . The display device of claim 12 , wherein an emission control signal is applied to the first gate electrode and the auxiliary gate electrode.

15 . The display device of claim 12 , wherein the first gate electrode and the auxiliary gate electrode are portions of an emission control line.

16 . The display device of claim 12 , further comprising
a first light shielding layer on the base substrate; and a second light shielding layer on the first light shielding layer, wherein the first light shielding layer and the second light shielding layer are spaced apart from each other and overlap each other, wherein one of the first light shielding layer and the second light shielding layer is coupled to the second active layer, and the other one of the first light shielding layer and the second light shielding layer is coupled to the second gate electrode, and wherein a storage capacitor is formed by overlap between the first light shielding layer and the second light shielding layer.

17 . The display device of claim 12 , further comprising a driving transistor, a light emitting control transistor, and a switching transistor,
wherein an active layer of the driving transistor and an active layer of the light emitting control transistor are integrally formed, and wherein the active layer of the driving transistor and the active layer of the light emitting control transistor are distinguished from an active layer of the switching transistor.

18 . The display device of claim 17 , further comprising a sensing transistor,
wherein an active layer of the sensing transistor is integrally formed with the active layer of the driving transistor and the active layer of the light emitting control transistor, and wherein the active l

Assignees

• Lg Display Co Ltd

Inventors

• Park Sehee
• Jo Kwangmin
• Park Jeongwoo

Classifications

• H10D30/6755

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D30/6723

  having light shields · CPC title

• H10K59/1213

  the pixel elements being TFTs · CPC title

• H10D30/6757 Primary

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D30/6734

  having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs · CPC title