Electronic device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-12499792-B2
Application number	US-202318468752-A
Country	US
Kind code	B2
Filing date	Sep 18, 2023
Priority date	Oct 25, 2022
Publication date	Dec 16, 2025
Grant date	Dec 16, 2025

Abstract

An electronic device and a manufacturing method thereof are provided. The manufacturing method of the electronic device includes the following. A substrate is provided. A plurality of electronic units are transferred to the substrate. The electronic units are inspected to obtain M first defect maps. The M first defect maps are integrated into N second defect maps, where N<M. M repairing groups are provided according to the N second defect maps. Each of the repairing groups includes at least one repairing electronic unit. The M repairing groups are transferred to the substrate. At least two of the repairing groups have the same location distribution of repairing electronic units, and the location distribution is consistent with a defect distribution of one of the second defect maps.

First claim

What is claimed is:

1 . A manufacturing method of an electronic device comprising:
providing a substrate; transferring a plurality of electronic units to the substrate; inspecting the electronic units to obtain M first defect maps; integrating the M first defect maps into N second defect maps, where N<M; providing M repairing groups according to the N second defect maps, wherein each of the repairing groups comprises at least one repairing electronic unit; and transferring a plurality of repairing electronic units of the M repairing groups to the substrate; wherein at least two of the repairing groups have the same location distribution of repairing electronic units, and the location distribution is consistent with a defect distribution of one of the second defect maps, and wherein the substrate comprises M′ transfer regions, the electronic units comprise a plurality of electronic unit groups, and the electronic unit groups are respectively transferred to the M′ transfer regions, wherein the M first defect maps correspond to M transfer regions among the M′ transfer regions, where M≤M′.

2 . The manufacturing method according to claim 1 , wherein the second defect maps comprise at least one defect location, and a location of the repairing electronic unit corresponds to the defect location.

3 . The manufacturing method according to claim 1 , further comprising:
identifying, in the M repairing groups, the repairing electronic unit being inconsistent with a defect distribution in the M first defect maps; and disabling the repairing electronic unit being inconsistent or the electronic unit adjacent to the repairing electronic unit being inconsistent.

4 . The manufacturing method according to claim 3 , wherein the disabling is performed through laser cutting.

5 . The manufacturing method according to claim 1 , wherein the defect distribution of one of the second defect maps is a union of defect distributions of at least two of the first defect maps.

6 . The manufacturing method according to claim 1 , wherein the substrate comprises a plurality of main bonding regions and a plurality of backup bonding regions, wherein the electronic units are transferred to the main bonding regions, and the repairing electronic units are transferred to the backup bonding regions.

7 . The manufacturing method according to claim 1 , wherein at least one of the electronic units is transferred from a carrier to the substrate by a transfer head.

8 . The manufacturing method according to claim 7 , wherein at least one of the repairing electronic units is transferred from the same carrier or a different carrier to the substrate by another transfer head.

9 . The manufacturing method according to claim 1 , wherein inspecting the electronic units comprises performing a light-up test on the electronic units to determine locations of defects.

10 . The manufacturing method according to claim 9 , wherein the number of the repairing electronic units transferred to the substrate is greater than the number of the defects.

11 . A manufacturing method of an electronic device comprising:
providing a substrate; transferring a plurality of electronic units to the substrate; inspecting the electronic units to obtain M first defect maps; integrating the M first defect maps into N second defect maps, where N<M; providing M repairing groups according to the N second defect maps, wherein each of the repairing groups comprises at least one repairing electronic unit; and transferring a plurality of repairing electronic units of the M repairing groups to the substrate; wherein at least two of the repairing groups have the same location distribution of repairing electronic units, and the location distribution is consistent with a defect distribution of one of the second defect maps, and wherein integrating the M first defect maps into the N second defect maps comprises: dividing the M first defect maps into N groups, and each of the groups comprises K first defect maps, where 1<K<M; and integrating the K first defect maps in each of the groups to obtain the N second defect maps, wherein a defect distribution of each of the second defect maps is a union of defect distributions of the K first defect maps in the corresponding group.

12 . The manufacturing method according to claim 11 , wherein the M first defect maps are divided into the N groups according to the number of defects, repetition of defect locations, or production efficiency.

13 . The manufacturing method according to claim 11 , wherein the N groups comprise a first group and a second group, and the number of the first defect maps in the first group is different from the number of the first defect maps in the second group.

14 . The manufacturing method according to claim 11 , wherein providing the M repairing groups according to the N second defect maps comprises:
providing the repairing groups in an equal number according to the K first defect maps in the groups.

15 . The manufacturing method according to claim 14 , wherein the repairing groups corresponding to the same group have the same location distribution of repairing electronic units, and the location distribution is consistent with a defect distribution of the second defect map corresponding to the group.

16 . An electronic device comprising:
a substrate comprising M′ transfer regions, each of the M′ transfer regions comprising a plurality of bonding regions, each of the bonding regions comprising a main bonding region and a backup bonding region; M′ electronic unit groups respectively disposed on the M′ transfer regions, each of the M′ electronic unit groups comprising a plurality of electronic units respectively bonded to the main bonding regions; and M repairing groups respectively disposed on M transfer regions among the M′ transfer regions, wherein M≤M′, and each of the M repairing groups comprises at least one repairing electronic unit bonded to at least one of the backup bonding regions; wherein at least two of the M repairing groups have the same location distribution of repairing electronic units, and the number of the repairing electronic units in each of the M repairing groups is less than the number of the backup bonding regions in each of the M′ transfer regions.

17 . The electronic device according to claim 16 , wherein the electronic unit and the repairing electronic unit are respectively disposed on the main bonding region and the backup bonding region of at least one of the bonding regions, and a circuit electrically connected to one of the electronic unit and the repairing electronic unit has a laser cutting trace.

18 . The electronic device according to claim 16 , wherein at least two of the M repairing groups comprise a plurality of first repairing groups and a plurality of second repairing groups, and the first repairing groups and the second repairing groups have different location distributions of repairing electronic units.

19 . The electronic device according to claim 18 , wherein the first repairing group and the second repairing group have different numbers of repairing electronic units.

Assignees

• Innolux Corp

Inventors

• Cheng Kai
• Lin Fang-Ying
• Lin Ming-Chang
• Hsieh Tsau-Hua

Classifications

• H10W90/00

  Package configurations · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10P74/23

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title

• H10P72/0446

  Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates · CPC title

• H10P74/203 Primary

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title