Semiconductor device and method for manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-12488988-B2
Application number	US-202318095620-A
Country	US
Kind code	B2
Filing date	Jan 11, 2023
Priority date	Mar 16, 2022
Publication date	Dec 2, 2025
Grant date	Dec 2, 2025

Abstract

Provided is a semiconductor device including: a semiconductor layer having an uneven structure configured to include a recessed portion on one surface side thereof; a first electrode film (first deposited film) provided on the one surface of the semiconductor layer; and a second electrode film (second deposited film) provided on a bottom surface of the recessed portion, wherein an enlarged portion having a cross-sectional area enlarged with respect to a portion on an opening portion side of the recessed portion is provided.

First claim

What is claimed is:

1 . A semiconductor device comprising:
a semiconductor layer having an uneven structure configured to include a recessed portion on one surface side thereof; a first deposited film provided on the one surface of the semiconductor layer; and a second deposited film provided on a bottom surface of the recessed portion, wherein the recessed portion is provided with an enlarged portion having a cross-sectional area enlarged with respect to a portion on an opening portion side of the recessed portion, and wherein a starting position of the enlarged portion is positioned between the opening portion of the recessed portion and the bottom surface of the recessed portion in a depth direction of the recessed portion.

2 . The semiconductor device according to claim 1 , wherein an inner wall surface of the recessed portion is provided with a narrowed portion formed by narrowing an intermediate portion with respect to the opening portion of the recessed portion.

3 . The semiconductor device according to claim 2 , wherein the narrowed portion is configured of a first inclined surface that gradually decreases a cross-sectional area of the recessed portion toward the bottom surface of the recessed portion, and a second inclined surface that is continuous with the first inclined surface and gradually increases the cross-sectional area of the recessed portion toward the bottom surface of the recessed portion.

4 . The semiconductor device according to claim 3 , wherein the first inclined surface is continuous with the opening portion of the recessed portion.

5 . The semiconductor device according to claim 3 , wherein the first inclined surface is separated from the opening portion of the recessed portion.

6 . The semiconductor device according to claim 1 , wherein the first deposited film and the second deposited film are metal films.

7 . The semiconductor device according to claim 6 , wherein, on the one surface side of the semiconductor layer, an insulating film or dielectric film is provided between the metal film and the semiconductor layer.

8 . The semiconductor device according to claim 1 ,
wherein the semiconductor layer includes a first conductivity type semiconductor layer and a second conductivity type semiconductor layer, and the recessed portion extends through the second conductivity type semiconductor layer into the first conductivity type semiconductor layer, and the enlarged portion is located in the second conductivity type semiconductor layer.

9 . A method for manufacturing a semiconductor device comprising:
a processing step of forming an uneven structure including a recessed portion on one surface side of a semiconductor layer; and a deposition step of performing film formation through deposition on the one surface side of the semiconductor layer to form a first deposited film on one surface of the semiconductor layer and to form a second deposited film on a bottom surface of the recessed portion, wherein the processing step includes a first step performed by anisotropic etching and a second step including isotropic etching subsequent to the first step.

10 . The method for manufacturing a semiconductor device according to claim 9 ,
wherein, in the first step, reactive ion etching is used as the anisotropic etching, and in the second step including the isotropic etching, a Bosch process is used.

Assignees

• Hamamatsu Photonics Kk

Inventors

• Dong Wei
• Hirose Kazuyoshi

Classifications

• H10P14/414

  of metal-silicide materials · CPC title

• H10P50/244 Primary

  comprising alternated and repeated etching and passivation steps · CPC title

• H10H20/034

  of coatings · CPC title

• H10H20/819

  characterised by their shape, e.g. curved or truncated substrates · CPC title

• H10F30/227

  the potential barrier being a Schottky barrier · CPC title