Digital isolator and digital signal transmission method thereof

Patent metadata

Field	Value
Publication number	US-12482914-B2
Application number	US-202218072851-A
Country	US
Kind code	B2
Filing date	Dec 1, 2022
Priority date	Dec 2, 2021
Publication date	Nov 25, 2025
Grant date	Nov 25, 2025

Abstract

A digital isolator can include: an encoding circuit configured to receive an input digital signal, and to encode a rising edge and a falling edge of the input digital signal into different coded signals; an isolating element coupled to encoding circuit, and being configured to transmit the coded signal in an electrical isolation manner; and a decoding circuit configured to receive the coded signal through the isolation element, and to decode the coded signal to obtain the rising edge and the falling edge, in order to output an output digital signal consistent with the input digital signal, where the rising edge of the input digital signal is encoded as a first pulse sequence, and the falling edge of the input digital signal is encoded as a second pulse sequence different from the first pulse sequence.

First claim

What is claimed is:

1 . A digital isolator, comprising:
a) an encoding circuit configured to receive an input digital signal, and to encode a rising edge and a falling edge of the input digital signal into different coded signals; b) an isolating element coupled to the encoding circuit, and being configured to transmit the coded signals in an electrical isolation manner; and c) a decoding circuit configured to receive the coded signal through the isolation element, and to decode the coded signal to obtain the rising edge and the falling edge, in order to output an output digital signal consistent with the input digital signal, d) wherein the rising edge of the input digital signal is encoded as a first pulse sequence, and the falling edge of the input digital signal is encoded as a second pulse sequence different from the first pulse sequence, and e) wherein the encoding circuit is configured to output each of the coded signals after detecting the rising edge and the falling edge, and the encoding circuit is configured to output the rising edge after detecting the first pulse sequence and to output the falling edge after detecting the second pulse sequence.

2 . The digital isolator of claim 1 , wherein the first pulse sequence comprises N positive pulses and M negative pulses arranged in a first manner, and the second pulse sequence comprises N positive pulses and M negative pulses arranged in a second manner, wherein N and M are positive integers greater than 1.

3 . The digital isolator of claim 1 , wherein pulse groups in the first pulse sequence and in the second pulse sequence have a same mode, and the pulse group has multiple positive pulses of a same width, and a time interval between the pulse groups differs from a time interval between different pulses within the pulse group.

4 . The digital isolator of claim 1 , wherein pulse groups in the first pulse sequence and in the second pulse sequence have a same mode, and the pulse group has at least one positive pulse and at least one negative pulse.

5 . The digital isolator of claim 1 , wherein pulse groups in the first pulse sequence and in the second pulse sequence have a same mode, and the pulse group has multiple positive pulses of different widths.

6 . The digital isolator of claim 1 , wherein pulse groups in the first pulse sequence and in the second pulse sequence have different modes, and the pulse group has different numbers of positive pulses and/or different numbers of negative pulses.

7 . The digital isolator of claim 1 , wherein pulse groups in the first pulse sequence and in the second pulse sequence have different modes, and the pulse group has different numbers of positive pulses and/or a pulse width or a pulse interval of the pulse group is different.

8 . The digital isolator of claim 1 , wherein the first pulse sequence and the second pulse sequence comprise different number of pulse groups, each pulse group has a same mode, and the pulse group comprises at least two pulses.

9 . The digital isolator of claim 1 , wherein the first pulse sequence and the second pulse sequence comprise pulse groups with different modes, and the pulse properties or repetition modes of the pulse groups with different modes are different.

10 . A method of digital signal transmission, the method comprising:
a) receiving an input digital signal; b) encoding a rising edge and a falling edge of the input digital signal into different coded signals, respectively; c) transmitting the coded signals by electrical isolation; and d) receiving the coded signal and decoding the coded signal to obtain the rising edge and the falling edge, in order to output an output digital signal consistent with the input digital signal, e) wherein the rising edge of the input digital signal is encoded as a first pulse sequence, and the falling edge of the input digital signal is encoded as a second pulse sequence different from the first pulse sequence, and f) wherein encoding the rising edge and the falling edge of the input digital signal into different coded signals comprises outputting each of the coded signals after detecting the rising edge and the falling edge, wherein the encoding circuit is configured to output the rising edge after detecting the first pulse sequence and output the falling edge after detecting the second pulse sequence.

11 . The method of claim 10 , wherein the first pulse sequence comprises N positive pulses and M negative pulses arranged in a first manner, and the second pulse sequence comprises N positive pulses and M negative pulses arranged in a second manner, wherein N and M are positive integers greater than 1.

12 . The method of claim 10 , wherein pulse groups in the first pulse sequence and in the second pulse sequence have a same mode, and the pulse group has multiple positive pulses of a same width, and a time interval between the pulse groups differs from a time interval between different pulses within the pulse group.

13 . The method of claim 10 , wherein pulse groups in the first pulse sequence and in the second pulse sequence have a same mode, and the pulse group has at least one positive pulse and at least one negative pulse.

14 . The method of claim 10 , wherein pulse groups in the first pulse sequence and in the second pulse sequence have a same mode, and the pulse group has multiple positive pulses of different widths.

15 . The method of claim 10 , wherein pulse groups in the first pulse sequence and in the second pulse sequence have different modes, and the pulse group has different numbers of positive pulses and/or different numbers of negative pulses.

16 . The method of claim 10 , wherein pulse groups in the first pulse sequence and in the second pulse sequence have different modes, and the pulse group has different numbers of positive pulses and/or a pulse width or a pulse interval of the pulse group is different.

17 . The method of claim 10 , wherein the first pulse sequence and the second pulse sequence comprise different number of pulse groups, each pulse group has a same mode, and the pulse group comprises at least two pulses.

18 . The method of claim 10 , wherein the first pulse sequence and the second pulse sequence comprise pulse groups with different modes, and the pulse properties or repetition modes of the pulse groups with different modes are different.

Assignees

• Silergy Semiconductor Technology Hangzhou Ltd

Inventors

• Fang Chiqing
• Chen Wei
• Dong Yufei
• Huang Xiaodong
• Zhao Chen

Classifications

• H03M5/16

  the pulses having three levels · CPC title

• H03M5/14

  Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code · CPC title

• H01P1/36 Primary

  Isolators · CPC title

• H03K19/017545 Primary

  Coupling arrangements; Impedance matching circuits · CPC title

• H03K19/017509 Primary

  Interface arrangements · CPC title