Semiconductor device having a plurality of pillars and method of manufacturing the semiconductor device

Patent metadata

Field	Value
Publication number	US-12477789-B2
Application number	US-202017918330-A
Country	US
Kind code	B2
Filing date	Jun 24, 2020
Priority date	Jun 24, 2020
Publication date	Nov 18, 2025
Grant date	Nov 18, 2025

Abstract

The present disclosure relates a semiconductor device using a super junction structure, and includes: a semiconductor base body of a first conductivity type; a pillar part including a plurality of first pillars of a first conductivity type and a plurality of second pillars of a second conductivity type provided on the semiconductor base body to protrude in a thickness direction of the semiconductor base body; a pillar surrounding part of a first conductivity type or a second conductivity type provided around the pillar part; and a semiconductor element in which the pillar part is provided as an active region, wherein the plurality of first and second pillars have a striped shape in a plan view, and are alternately arranged in parallel to each other in a pillar width direction perpendicular to a longitudinal direction of each of the pillars.

First claim

The invention claimed is:

1 . A semiconductor device, comprising:
a semiconductor base body of a first conductivity type; a pillar part including a plurality of first pillars of a first conductivity type and a plurality of second pillars of a second conductivity type provided on the semiconductor base body to protrude in a thickness direction of the semiconductor base body; a pillar surrounding part of a first conductivity type or a second conductivity type provided around the pillar part; and a semiconductor element in which the pillar part is provided as an active region, wherein the plurality of first and second pillars have a striped shape in a plan view, and are alternately arranged in parallel to each other in a pillar width direction perpendicular to a longitudinal direction of each of the pillars, the pillar surrounding part is provided to wholly surround, with a width, the pillar part protruding on the semiconductor base body so that upper surfaces of the plurality of first and second pillars are exposed, when a conductivity type of the pillar surrounding part is a second conductivity type, a product of a concentration of an impurity of the pillar surrounding part and the width of the pillar surrounding part is set to be larger than a product of a concentration of an impurity of a second conductivity type of the second pillar and a width of the second pillar, and when a conductivity type of the pillar surrounding part is a first conductivity type, a product of a concentration of an impurity of the pillar surrounding part and the width of the pillar surrounding part is set to be larger than a product of a concentration of an impurity of a first conductivity type of the first pillar and a width of the first pillar.

2 . The semiconductor device according to claim 1 , wherein
a conductivity type of the pillar surrounding part is a second conductivity type, a concentration of an impurity of a second conductivity type of the pillar surrounding part is identical with a concentration of an impurity of a second conductivity type of the second pillar, and the width of the pillar surrounding part is set to be larger than the width of the second pillar.

3 . The semiconductor device according to claim 1 , wherein
a conductivity type of the pillar surrounding part is a first conductivity type, a concentration of an impurity of a first conductivity type of the pillar surrounding part is identical with a concentration of an impurity of a first conductivity type of the first pillar, and the width of the pillar surrounding part is set to be larger than the width of the first pillar.

4 . The semiconductor device according to claim 1 , further comprising
a surrounding part provided on the semiconductor base body on an outer side of the pillar surrounding part and having a conductivity type identical with the pillar surrounding part.

5 . The semiconductor device according to claim 1 , wherein silicon carbide is used as a material of a semiconductor in the semiconductor base body.

6 . The semiconductor device according to claim 1 , wherein
a ratio of a height of the semiconductor layer provided below the pillar part to a height of the semiconductor layer provided below the pillar surrounding part is 2:1.

7 . A semiconductor device, comprising:
a semiconductor base body of a first conductivity type; a pillar part including a plurality of first pillars of a first conductivity type and a plurality of second pillars of a second conductivity type provided on the semiconductor base body to protrude in a thickness direction of the semiconductor base body; a pillar surrounding part of a first conductivity type or a second conductivity type provided around the pillar part; and a semiconductor element in which the pillar part is provided as an active region, wherein the plurality of first and second pillars have a striped shape in a plan view, and are alternately arranged in parallel to each other in a pillar width direction perpendicular to a longitudinal direction of each of the pillars, the semiconductor base body includes: a semiconductor substrate of a first conductivity type; and a semiconductor layer of a first conductivity type provided on the semiconductor substrate, and a height of the semiconductor layer provided below the pillar surrounding part is lower than a height of the semiconductor layer provided below the pillar part, and a ratio of the height of the semiconductor layer provided below the pillar part to the height of the semiconductor layer provided below the pillar surrounding part is 2:1.

8 . A method of manufacturing a semiconductor device, comprising:
a step (a) of forming a first semiconductor layer of a first conductivity type on a semiconductor substrate of a first conductivity type by epitaxial growth; a step (b) of etching the first semiconductor layer to form a plurality of convex parts protruding in a thickness direction of the semiconductor substrate at intervals and forming a surrounding part of the plurality of convex parts; a step (c) of forming a second semiconductor layer of a second conductivity type between the plurality of convex parts, an upper portion of the plurality of convex parts, and an upper portion of the surrounding part by epitaxial growth; a step (d) of removing at least the second semiconductor layer on an upper portion of the plurality of convex parts and exposing upper surfaces of the plurality of convex parts to constitute a plurality of first pillars of a first conductivity type and making the second semiconductor layer between the plurality of convex parts constitute a plurality of second pillars of a second conductivity type, thereby forming a pillar part, and making the second semiconductor layer on the upper portion of the surrounding part constitute a pillar surrounding part of a second conductivity type surrounding the pillar part; and a step (e) of forming a semiconductor element in which the pillar part constitutes an active region, wherein the step (b) includes a step of performing etching so that each of the plurality of convex parts has a striped shape in a plan view, and is arranged in parallel to each other at intervals in a width direction perpendicular to a longitudinal direction of the convex parts, and the plurality of first and second pillars have a striped shape in a plan view, and are alternately arranged in parallel to each other in the width direction perpendicular to a longitudinal direction of each of the pillars.

9 . The method of manufacturing the semiconductor device according to claim 8 , wherein
the step (c) includes steps of epitaxially growing the second semiconductor layer to wholly surround, with a width, the pillar part protruding on the semiconductor substrate and make a product of a concentration of an impurity of a second conductivity type and the width larger than a product of a concentration of an impurity of a second conductivity type of the second pillar and a width of the second pillar.

10 . The method of manufacturing the semiconductor device according to claim 9 , wherein
the step (c) includes steps of epitaxially growing the second semiconductor layer so that a concentration of an impurity of a second conductivity type of the pillar surrounding part is identical with a concentration of an impurity of a second conductivity type of the second pillar and the width of the pillar surrounding part is larger than the pillar width of the second pillar.

11 . The method of manufacturing the semiconductor device according to claim 8 , wherein
the step (c) includes a step of epitaxially growing the second semiconductor layer to wholly surround, with a width, the pi

Assignees

• Mitsubishi Electric Corp

Inventors

• Tarui Yoichiro
• Fujiwara Nobuo
• Tanaka Takanori

Classifications

• H10P50/00

  Etching of wafers, substrates or parts of devices · CPC title

• H10P14/3408

  Silicon carbide · CPC title

• H10P30/222

  characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221) · CPC title

• H10D84/146

  the built-in components being Schottky barrier diodes · CPC title

• H10D62/8325

  Silicon carbide · CPC title