High quality quantum computer components

Patent metadata

Field	Value
Publication number	US-12471502-B2
Application number	US-202217898880-A
Country	US
Kind code	B2
Filing date	Aug 30, 2022
Priority date	Feb 17, 2022
Publication date	Nov 11, 2025
Grant date	Nov 11, 2025

Abstract

Exemplary methods of fabricating high quality quantum computing components are described. The methods include removing native oxide from a deposition surface of a silicon substrate in a cleaning chamber of a processing system, and transferring the silicon substrate under vacuum to a deposition chamber of the processing system. The methods further include depositing an aluminum layer on the deposition surface of the silicon substrate in the deposition chamber, where an interface between the aluminum layer and the deposition surface of the silicon substrate is oxygen free.

First claim

The invention claimed is:

1 . A processing method to form a device component, the processing method comprising:
removing native oxide from a deposition surface of a silicon substrate in a cleaning chamber of a processing system; transferring the silicon substrate under vacuum to a deposition chamber of the processing system; depositing an aluminum layer on the deposition surface of the silicon substrate in the deposition chamber, wherein an interface between the aluminum layer and the deposition surface of the silicon substrate is oxygen free; forming a patterned photoresist layer on the aluminum laver, wherein the patterned photoresist layer comprises patterned openings that provide access to an exposed portion of the aluminum layer; removing the exposed portion of the aluminum layer down to the silicon substrate to form a patterned aluminum laver; removing the patterned photoresist layer from the patterned aluminum layer; removing native aluminum oxide from an exposed surface of the patterned aluminum layer, wherein the removal of the native aluminum oxide forms a cleaned patterned aluminum layer that is free of oxygen on the exposed surface of the patterned aluminum layer; and forming an aluminum oxide layer on the cleaned patterned aluminum layer in the deposition chamber.

2 . The processing method of claim 1 , wherein the method further comprises:
providing a pretreated silicon substrate to a degassing chamber of the processing system to form a degassed silicon substrate; transferring the degassed silicon substrate under vacuum to a cooling chamber of the processing system to cool the silicon substrate; and transferring the silicon substrate under vacuum to the cleaning chamber of the processing system.

3 . The processing method of claim 1 , wherein the method further comprises forming the patterned aluminum layer into the device component, wherein the device component is a co-planar waveguide resonator.

4 . The processing method of claim 1 , wherein the method further comprises: providing the silicon substrate with the patterned aluminum layer to the cleaning chamber of the processing system transferring the silicon substrate with the cleaned patterned aluminum layer under vacuum to the deposition chamber of the processing system; and forming a second aluminum layer on the aluminum oxide layer in the deposition chamber, wherein the silicon substrate stays in the deposition chamber for both the forming of the aluminum oxide layer and the forming of the second aluminum layer.

5 . The processing method of claim 4 , wherein the second aluminum layer is also formed directly on the silicon substrate, and wherein an interface between the second aluminum layer and the silicon substrate is oxygen free.

6 . The processing method of claim 4 , wherein the method further comprises forming the silicon substrate having the second aluminum layer into the device component, wherein the device component is a Josephson Junction.

7 . A processing method to form a device component, the processing method comprising:
removing native oxide from a deposition surface of a silicon substrate in a cleaning chamber of a processing system; transferring the silicon substrate under vacuum to a deposition chamber of the processing system; depositing a first aluminum layer on the deposition surface of the silicon substrate in the deposition chamber, wherein an interface between the first aluminum layer and the deposition surface of the silicon substrate is oxygen free; patterning the first aluminum layer to form a first patterned aluminum layer; forming and patterning a patterned dielectric layer on the first patterned aluminum layer and the silicon substrate; forming an aluminum oxide layer on the first patterned aluminum layer, wherein the aluminum oxide layer is not formed on the first patterned aluminum layer that is covered by the patterned dielectric layer; forming a second aluminum layer on the aluminum oxide layer and the patterned dielectric layer, wherein the silicon substrate stays in the deposition chamber for both the forming of the aluminum oxide layer and the forming of the second aluminum layer; and removing the patterned dielectric layer from the silicon substrate, wherein the removal of the patterned dielectric layer forms a second patterned aluminum layer from the second aluminum layer.

8 . The processing method of claim 7 , wherein the second aluminum layer is also formed directly on the silicon substrate, and wherein an interface between the second aluminum layer and the silicon substrate is oxygen free.

9 . The processing method of claim 7 , wherein the method further comprises forming the silicon substrate having the second aluminum layer into the device component, wherein the device component is a Josephson Junction.

10 . The processing method of claim 7 , wherein the first aluminum layer and the second aluminum layer are formed by physical vapor deposition.

11 . The processing method of claim 7 , wherein the patterning of the first aluminum layer to form the first patterned aluminum layer includes reactive ion etching of the first aluminum layer.

12 . The processing method of claim 7 , wherein the patterned dielectric layer comprises a silicon oxide or silicon nitride layer that is formed on the first patterned aluminum layer by physical vapor deposition or flowable chemical vapor deposition.

13 . The processing method of claim 7 , wherein the patterning of the first aluminum layer includes forming a photoresist layer on the first aluminum layer and patterning the photoresist layer, wherein the photoresist layer comprises a carbon-containing hardmask.

Assignees

• Applied Materials Inc

Inventors

• Yang Zihao
• Zhu Mingwei
• Yu Lan
• Chen Zhebo
• Visser Robert Jan
• Patibandla Nag

Classifications

• H10N60/805

  for Josephson-effect devices · CPC title

• G06N10/40

  Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title

• H10N60/0912 Primary

  of Josephson-effect devices · CPC title

• H10N69/00

  Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00 · CPC title

• H10N60/12

  Josephson-effect devices · CPC title