Card edge connector including a flipped pin foot orientation

US12469993B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12469993-B2
Application numberUS-202117483913-A
CountryUS
Kind codeB2
Filing dateSep 24, 2021
Priority dateSep 24, 2021
Publication dateNov 11, 2025
Grant dateNov 11, 2025

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

In one embodiment, a card edge connector includes a housing including a slot to receive a first circuit board. A first plurality of pins extend from within the slot through a bottom of the housing. Each of the first plurality of pins includes a first end to mate with a corresponding contact of the first circuit board and a second end to mate with a corresponding one of a first plurality of contacts of a second circuit board, the second end including a heel portion and a toe portion extending from the heel portion in a direction away from a centerline of the slot. A second plurality of pins extend from within the slot through the bottom of the housing. Each of the second plurality of pins includes a first end to mate with a corresponding contact of the first circuit board and a second end to mate with a corresponding one of a second plurality of contacts of the second circuit board, the second end comprising a heel portion and a toe portion extending from the heel portion in a direction toward the centerline of the slot. Other embodiments are described and claimed.

First claim

Opening claim text (preview).

What is claimed is: 1 . A card edge connector comprising: a housing comprising a slot to receive a first circuit board; a first plurality of pins extending from within the slot through a bottom of the housing, each of the first plurality of pins comprising a first end to mate with a corresponding contact of the first circuit board and a second end comprising a respective toe portion and a cylindrical contact coupled to the respective toe portion to mate with a corresponding one of a first plurality of contacts of a second circuit board in a through-hole mount, and a respective heel portion, the respective toe portion extending from the respective heel portion in a direction away from a centerline of the slot; and a second plurality of pins extending from within the slot through the bottom of the housing, each of the second plurality of pins comprising a first end to mate with a corresponding contact of the first circuit board and a second end comprising a respective toe portion and a cylindrical contact coupled to the respective toe portion to mate with a corresponding one of a second plurality of contacts of the second circuit board in a through-hole mount, and a respective heel portion, wherein the respective toe portion extends from the respective heel portion of each of the second plurality of pins in a direction toward the centerline of the slot, wherein for the first and second pluralities of pins, a stub length of the corresponding contact of the second circuit board extends past the heel portion. 2 . The card edge connector of claim 1 , wherein the first plurality of pins are disposed along a first side of the slot and the second plurality of pins are disposed along a second side of the slot, opposite the first side of the slot. 3 . The card edge connector of claim 1 , wherein the card edge connector comprises a Peripheral Component Interconnect Express (PCIe) connector to receive the first circuit board, and the first circuit board comprises a PCIe circuit board. 4 . The card edge connector of claim 1 , wherein each of first and second plurality of contacts of the second circuit board are connected to a corresponding toe-routed signal line and each of the first and second plurality of pins are to be coupled to the corresponding toe-routed signal line via the toe portion. 5 . The card edge connector of claim 1 , wherein the card edge connector is to enable communication between at least one memory device adapted to the first circuit board and a processor adapted to the second circuit board. 6 . The edge card connector of claim 1 , wherein the first plurality of pins are one of a plurality of transmit pins and a plurality of receive pins and the second plurality of pins are the other one of the plurality of transmit pins and the plurality of receive pins. 7 . The card edge connector of claim 1 , wherein: the first plurality of pins comprises consecutive adjacent pairs of pins with the toe portion extending from the heel portion in the direction away from a centerline of the slot; and the second plurality of pins comprises consecutive adjacent pairs of pins with the toe portion extending from the heel portion in the direction toward the centerline of the slot. 8 . A system comprising: a motherboard comprising: a processor; a first and second plurality of contacts on a surface of the motherboard; and one or more signal lines to couple the processor to one or more of the first and second plurality of contacts; and a card edge connector comprising: a housing including a slot to receive a circuit board; a first plurality of pins extending from within the slot through a bottom of the housing, each of the first plurality of pins comprising a first end to mate with a corresponding contact of the circuit board and a second end comprising a respective toe portion and a cylindrical contact coupled to the respective toe portion to mate with a corresponding one the first plurality of contacts of the motherboard in a through-hole mount, and a respective heel portion, the respective toe portion extending from the respective heel portion in a direction away from a centerline of the slot; and a second plurality of pins extending from within the slot through the bottom of the housing, each of the second plurality of pins comprising a first end to mate with a corresponding contact of the circuit board and a second end comprising a respective toe portion and a cylindrical contact coupled to the respective toe portion to mate with a corresponding one of the second plurality of contacts of the motherboard in a through-hole mount, and a respective heel portion, wherein the toe portion extends from the respective heel portion in a direction toward the centerline of the slot, wherein for the first and second pluralities of pins, a stub length of the corresponding contact of the motherboard extends past the heel portion. 9 . The system of claim 8 , wherein the card edge connector comprises a surface mount Peripheral Component Interconnect Express (PCIe) connector and the circuit board comprises a PCIe circuit board. 10 . The system of claim 8 , wherein each of first and second plurality of pins are to be coupled to a corresponding signal line via the toe portion and a corresponding one of the first and second plurality of contacts of the circuit board. 11 . The system of claim 8 , wherein the motherboard comprises one of a half width board, high density small board, or a riser card. 12 . A card electromechanical connector comprising: a housing comprising a slot to receive a first circuit board; a first plurality of connectors extending from within the slot through a bottom of the housing, each of the first plurality of connectors comprising a first end to mate with a corresponding contact of the first circuit board and a second end to mate with a corresponding one of a first plurality of conductive pads of a motherboard, the second end comprising a heel portion and a toe portion extending from the heel portion in a direction away from a centerline of the slot; and a second plurality of connectors extending from within the slot through the bottom of the housing, each of the second plurality of connectors comprising a first end to mate with a corresponding contact of the first circuit board and a second end to mate with a corresponding one of a second plurality of conductive pads of the motherboard, the second end comprising a heel portion and a toe portion extending from the heel portion in a direction toward the centerline of the slot, wherein for the first and second pluralities of connectors, a stub length of the corresponding conductive pad of the motherboard extends past the heel portion. 13 . The card electromechanical connector of claim 12 , wherein the card electromechanical connector comprises a Peripheral Component Interconnect Express (PCIe) connector to receive the first circuit board comprising a PCIe circuit board. 14 . The card electromechanical connector of claim 12 , wherein each of the first and second plurality of conductive pads of the motherboard are connected to a corresponding toe-routed signal line and each of the first and second plurality of connectors are to be coupled to the corresponding toe-routed signal line via the toe portion and the corresponding one of the first and second plurality of conductive pads of the motherboard.

Assignees

Inventors

Classifications

  • cooperating directly with the edge of the rigid printed circuits · CPC title

  • Printed circuits being substantially perpendicular to each other (for printed connections H05K3/366) · CPC title

  • by variation of conductive properties, e.g. by dimension variations · CPC title

  • H01R12/57Primary

    surface mounting terminals · CPC title

Patent family

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External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12469993B2 cover?
In one embodiment, a card edge connector includes a housing including a slot to receive a first circuit board. A first plurality of pins extend from within the slot through a bottom of the housing. Each of the first plurality of pins includes a first end to mate with a corresponding contact of the first circuit board and a second end to mate with a corresponding one of a first plurality of cont…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H01R12/57. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 11 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).