Location agnostic data access

Patent metadata

Field	Value
Publication number	US-12468537-B2
Application number	US-202217575563-A
Country	US
Kind code	B2
Filing date	Jan 13, 2022
Priority date	Jan 13, 2022
Publication date	Nov 11, 2025
Grant date	Nov 11, 2025

Abstract

Apparatuses, systems, and techniques to enable a program to access data regardless of where said data is stored. In at least one embodiment, a system enables a program to access data regardless of where said data is stored, based on, for example, one or more locations encoding one or more addresses of said data.

First claim

What is claimed is:

1 . A processor, comprising:
one or more circuits to cause two or more software programs to access a same physical storage location based, at least in part, on a common index used in one or more physical storage tables of each of the two or more software programs to indicate one or more entries within one or more physical storage tables.

2 . The processor of claim 1 , wherein the one or more circuits are further to:
obtain source code of the two or more software programs; and enable the two or more software programs to access data of the physical storage location regardless of where the data is stored by at least compiling the source code to executable code that indicates one or more locations corresponding to the data.

3 . The processor of claim 2 , wherein the one or more locations are stored in constant memory.

4 . The processor of claim 2 , wherein the one or more locations encode one or more addresses of data.

5 . The processor of claim 1 , wherein the two or more software programs are is executable by one or more graphics processing units (GPUs).

6 . The processor of claim 1 , wherein the one or more circuits are further to execute the two or more software programs by at least obtaining data of the physical storage location based on one or more locations encoding one or more addresses of the data regardless of where the data is stored relative to other data.

7 . The processor of claim 1 , wherein the two or more software programs encode one or more kernels.

8 . A system, comprising:
one or more computers having one or more processors to cause two or more software programs to access a same physical storage location based, at least in part, on a common index used in one or more physical storage tables of each of the two or more software programs to indicate one or more entries within one or more physical storage tables.

9 . The system of claim 8 , wherein the one or more processors are further to generate assembly code based at least in part on code of the two or more software programs, wherein the assembly code is generated to use a same memory location in a constant memory bank regardless of where data of the physical storage location is stored.

10 . The system of claim 9 , wherein the assembly code encodes one or more locations corresponding to the data to indicate one or more addresses of where the data is stored.

11 . The system of claim 8 , wherein the one or more processors are further to cause the two or more software programs to:
generate a current address of data of the physical storage location after the data has moved to a new memory location; obtain the current address of the data by using one or more indicators stored in a constant memory bank; and access the data using the current address.

12 . The system of claim 8 , wherein the two or more software programs access data of the physical storage location based at least in part on one or more addresses stored in one or more registers.

13 . The system of claim 8 , wherein data of the physical storage location includes at least one of: image data, video data, and audio data.

14 . The system of claim 8 , wherein the two or more software programs is are executable by one or more general purpose graphics processing units (GPGPUs).

15 . A machine-readable medium having stored thereon a set of instructions, which if performed by one or more processors, cause the one or more processors to at least:
cause two or more software programs to access a same physical storage location based, at least in part, on a common index used in one or more physical storage tables of each of the two or more software programs to indicate one or more entries within one or more physical storage tables.

16 . The machine-readable medium of claim 15 , wherein the set of instructions further include instructions, which if performed by the one or more processors, cause the one or more processors to access data of the physical storage location using one or more addresses of the data stored in one or more registers.

17 . The machine-readable medium of claim 15 , wherein data of the physical storage location includes one or more components of a library.

18 . The machine-readable medium of claim 15 , wherein the two or more software programs indicate data of the physical storage location through one or more locations in a register corresponding to the data.

19 . The machine-readable medium of claim 18 , wherein the set of instructions further include instructions, which if performed by the one or more processors, cause the one or more processors to:
obtain another program that indicates the data; and enable the other program to access the data by at least causing the other program to indicate how to access the data through the one or more locations in the register corresponding to the data.

20 . The machine-readable medium of claim 15 , wherein data of the physical storage location includes one or more data objects.

21 . The machine-readable medium of claim 15 , wherein the two or more software programs is are executable by one or more parallel processing units (PPUs).

22 . A method, comprising:
causing two or more software programs to access a same physical storage location based, at least in part, on a common index used in one or more physical storage tables of each of the two or more software programs to indicate one or more entries within one or more physical storage tables.

23 . The method of claim 22 , further comprising generating executable code based at least in part on source code, wherein the executable code encodes one or more locations in memory that comprise a first set of addresses corresponding to a first set of memory locations of data of the physical storage location.

24 . The method of claim 23 , further comprising:
transferring the data to a second set of memory locations; and updating the one or more locations in the memory to comprise a second set of addresses corresponding to the second set of memory locations.

25 . The method of claim 22 , wherein the two or more software programs access data of the physical storage location based on a register that indicates an actual location of the data.

26 . The method of claim 22 , further comprising executing a plurality of programs that utilize data of the physical storage location, wherein the plurality of programs indicate the data through one or more locations that encode one or more addresses of the data.

27 . The method of claim 22 , wherein data of the physical storage location includes one or more data structures.

Assignees

• Nvidia Corp

Inventors

• Piechotka Maciej Marcin
• Perelygin Kyrylo
• Long Ze
• Boissel Raphael Dominique Pierre
• Murphy Michael
• Ladram Anis
• Gelado Isaac
• Bharambe Girish Bhaskarrao
• Jodlowski Sebastian Piotr

Classifications

• G06F9/3851

  from multiple instruction streams, e.g. multistreaming · CPC title

• G06F9/3888

  controlled by a single instruction for multiple threads [SIMT] in parallel · CPC title

• G06F13/1663

  Access to shared memory · CPC title

• G06F9/545

  where tasks reside in different layers, e.g. user- and kernel-space · CPC title

• G06F9/3879

  for non-native instruction execution, e.g. executing a command; for Java instruction set · CPC title