Display device

Patent metadata

Field	Value
Publication number	US-12464895-B2
Application number	US-202217745897-A
Country	US
Kind code	B2
Filing date	May 17, 2022
Priority date	May 27, 2021
Publication date	Nov 4, 2025
Grant date	Nov 4, 2025

Abstract

A display device includes a substrate, a circuit layer disposed on the substrate, and which includes a pixel circuit part having a first pixel circuit region and a second pixel circuit region, and a driving circuit part that is adjacent to the pixel circuit part, and a display layer disposed on the circuit layer, and which includes including a first display element region that overlaps the first pixel circuit region, a second display element region that overlaps the second pixel circuit region, and a third display element region that overlaps the driving circuit part, pixel circuits formed in the first pixel circuit region supply a first current to display elements formed in the first display element region, and pixel circuits formed in the second pixel circuit region supply a second current to display elements formed in the second and third display element regions.

First claim

What is claims is:

1 . A display device comprising:
a substrate; a circuit layer disposed on the substrate, the circuit layer including a pixel circuit part having a first pixel circuit region and a second pixel circuit region, and a driving circuit part that is adjacent to the pixel circuit part; and a display layer disposed on the circuit layer, and which includes a first display element region that overlaps the first pixel circuit region, a second display element region that overlaps the second pixel circuit region, and a third display element region that overlaps the driving circuit part, wherein pixel circuits formed in the first pixel circuit region are configured to supply a first current to display elements formed in the first display element region, wherein pixel circuits formed in the second pixel circuit region are configured to supply a second current to display elements formed in the second and third display element regions, and wherein the display elements in each second display element region and the display elements in each third display element region have an area that is greater than a corresponding area of the display elements in the first display element region.

2 . The display device of claim 1 , wherein the second current is greater than the first current.

3 . The display device of claim 1 , further comprising a driving transistor formed in each of the first and second pixel circuit regions, the driving circuit part configured to control an amount of a current flowing from a first power supply to a second power supply via a respective display element, and
the display element includes an organic light emitting element.

4 . The display device of claim 3 , wherein a light emitting region of an organic light emitting element formed in each of the second and third display element regions has an area that is two times or more greater than in a light emitting region of an organic light emitting element formed in the first display element region.

5 . The display device of claim 1 , wherein a channel width of a driving transistor formed in the second pixel circuit region is greater than a channel width of a driving transistor formed in the first pixel circuit region.

6 . The display device of claim 1 , wherein a channel width/channel length (W/L) of a driving transistor formed in the second pixel circuit region is two times or more greater than a W/L of a driving transistor formed in the first pixel circuit region.

7 . The display device of claim 1 , further comprising a first storage capacitor formed in the first pixel circuit region and a second storage capacitor formed in the second pixel circuit region, wherein an area of the second storage capacitor is greater than an area of the first storage capacitor.

8 . The display device of claim 1 , wherein, in the second pixel circuit region, pixel circuits are arranged in an odd-numbered region of a 4nth row, n being a positive integer greater than or equal to one, pixel circuits are arranged in an even-numbered region of a (4n−1)th row, pixel circuits are arranged in an even-numbered region of a (4n−2)th row, and pixel circuits are arranged in an odd-numbered region of a (4n−3)th row.

9 . The display device of claim 8 , wherein display elements corresponding to each of the second and third display element regions expand in a lateral direction.

10 . The display device of claim 9 , wherein the pixel circuits arranged in the odd-numbered region of the 4nth row are configured to drive display elements arranged in a region of a 4nth row of the display layer,
the pixel circuits arranged in the even-numbered region of the (4n−1)th row are configured to drive display elements arranged in a region of a (4n−1)th row of the display layer, the pixel circuits arranged in the even-numbered region of the (4n−2)th row are configured to drive display elements arranged in a region of a (4n−2)th row of the display layer, and the pixel circuits arranged in the odd-numbered region of the (4n−3)th row are configured to drive display elements arranged in a region of a (4n−3)th row of the display layer.

11 . The display device of claim 9 , wherein the pixel circuits arranged in the odd-numbered region of the 4nth row are configured to drive display elements arranged in a region of a (4n−1)th row of the display layer,
the pixel circuits arranged in the even-numbered region of the (4n−1)th row are configured to drive display elements arranged in a region of a 4nth row of the display layer,
the pixel circuits arranged in the even-numbered region of the (4n−2)th row are configured to drive display elements arranged in a region of a (4n−2)th row of the display layer, and
the pixel circuits arranged in the odd-numbered region of the (4n−3)th row are configured to drive display elements arranged in a region of a (4n−3)th row of the display layer.

12 . The display device of claim 11 , wherein each display element includes an organic light emitting element, and
wherein the pixel circuits arranged in the odd-numbered region of the 4nth row drive organic light emitting elements arranged in the region of the (4n−1)th row of the display layer by way of an anode of an organic light emitting element formed in the third display element region that extends to the second display element region so as to be connected to a driving transistor of a pixel circuit.

13 . The display device of claim 11 , wherein each display element includes an organic light emitting element, and
wherein the pixel circuits arranged in the even-numbered region of the (4n−1) th row drive organic light emitting elements arranged in the region of the 4n th row of the display layer by way of an anode of an organic light emitting element formed in the third display element region that extends to the second display element region so as to be connected to a driving transistor of a pixel circuit.

14 . The display device of claim 1 , wherein, in the second pixel circuit region, pixel circuits are arranged in a region of a 4nth row (n is a positive integer greater than or equal to one), and pixel circuits are arranged in a region of a (4n−3)th row.

15 . The display device of claim 14 , wherein display elements corresponding to each of the second and third display element regions expand in a longitudinal direction.

16 . The display device of claim 15 , wherein the pixel circuits arranged in the region of the 4nth row are configured to drive display elements arranged in a region of a 4nth row of the display layer and expanding in the longitudinal direction, and
the pixel circuits arranged in the region of the (4n−3)th row are configured to drive display elements arranged in a region of a (4n−3)th row of the display layer and expanding in the longitudinal direction.

17 . The display device of claim 1 , wherein pixel circuits provided in the circuit layer and display elements provided in the display layer have an arrangement comprising:
an odd-numbered pixel circuit of an odd-numbered row is electrically connected to an odd-numbered display element of an odd-numbered row, and an even-numbered pixel circuit of the odd-numbered row is connected to an even-numbered display element of an even-numbered row; and an odd-numbered pixel circuit of an even-numbered row is connected to an odd-numbered display element of the even-numbered row, and an even-numbered pixel circuit of the even-numbered row is connected to an even-numbered display element of the odd-numbered row.

18 . The display device of claim 1 , wherein each first pixel

Assignees

• Samsung Display Co Ltd

Inventors

• Kim Sunho
• Park Juchan
• Ko Yoomin
• Kim Hyewon
• Lee Sun Hee

Classifications

• H10K59/121

  characterised by the geometry or disposition of pixel elements · CPC title

• H10K59/1216

  the pixel elements being capacitors · CPC title

• H10K59/131 Primary

  Interconnections, e.g. wiring lines or terminals · CPC title

• G09G2310/0232

  Special driving of display border areas · CPC title

• G09G2320/0626

  for control of overall brightness · CPC title