Analog front-end device

Patent metadata

Field	Value
Publication number	US-12463610-B2
Application number	US-202217830382-A
Country	US
Kind code	B2
Filing date	Jun 2, 2022
Priority date	Jul 14, 2021
Publication date	Nov 4, 2025
Grant date	Nov 4, 2025

Abstract

An analog front-end device includes an amplifier circuit, a first gain control circuit, and a tracking circuit. The amplifier circuit is configured to generate a first output signal according to a first input signal. The first gain control circuit is configured to set a first electronic component according to a first gain control signal and transmit the first input signal to a first input terminal of the amplifier circuit via the first electronic component, in which a terminal of the first electronic component is selectively coupled to the first input terminal or a first predetermined node. The tracking circuit is configured to adjust a level of the first predetermined node according to a level of the first input terminal, in order to reduce a voltage difference between the first input terminal and the first predetermined node.

First claim

What is claimed is:

1 . An analog front-end device, comprising:
an amplifier circuit configured to generate a first output signal according to a first input signal; a first gain control circuit configured to set a first electronic component according to a first gain control signal and transmit the first input signal to a first input terminal of the amplifier circuit via the first electronic component, wherein a terminal of the first electronic component is selectively coupled to the first input terminal or a first predetermined node; and a tracking circuit configured to adjust a level of the first predetermined node according to a level of the first input terminal, in order to reduce a voltage difference between the first input terminal and the first predetermined node and avoid a redistribution of charges on the first electronic component during a gain adjustment of the analog front-end device.

2 . The analog front-end device of claim 1 , wherein the first gain control circuit is an AC-coupling circuit.

3 . The analog front-end device of claim 1 , wherein the first gain control circuit comprises:
a plurality of switched-capacitor circuits configured to be switched according to a plurality of bits in the first gain control signal, in order to provide an equivalent capacitor as the first electronic component, wherein each of the plurality of switched-capacitor circuits comprises a capacitor, a capacitance value of the capacitor of at least one first circuit in the plurality of switched-capacitor circuits is set according to a transient error on the first output signal, and the at least one first circuit corresponds to at least one most significant bit in the plurality of bits.

4 . The analog front-end device of claim 3 , wherein the capacitance value of the capacitor of the at least one first circuit is set based on thermometer code, a capacitance value of the capacitor of at least one second circuit in the plurality of switched-capacitor circuits is set according to binary code, and the at least one second circuit corresponds to a least significant bit in the plurality of bits.

5 . The analog front-end device of claim 1 , wherein the tracking circuit is a unity-gain buffer circuit, and the unity-gain buffer circuit is configured to set the level of the first predetermined node according to the level of the first input terminal.

6 . The analog front-end device of claim 1 , wherein the amplifier circuit is further configured to generate the first output signal and a second output signal according to the first input signal and a second input signal, and the analog front-end device further comprises:
a second gain control circuit configured to set a second electronic component according to the first gain control signal and transmit the second input signal to a second input terminal of the amplifier circuit via the second electronic component, wherein a terminal of the second electronic component is selectively coupled to the second input terminal or a second predetermined node, and the tracking circuit is further configured to adjust a level of the second predetermined node according to a level of the second input terminal or according to the level of the first input terminal and the level of the second input terminal, in order to reduce a voltage difference between the second input terminal and the second predetermined node.

7 . The analog front-end device of claim 6 , wherein the tracking circuit comprises:
a first unity-gain buffer circuit configured to set the level of the first predetermined node according to the level of the first input terminal; and a second unity-gain buffer circuit configured to set the level of the second predetermined node according to the level of the second input terminal.

8 . The analog front-end device of claim 6 , wherein the first input terminal and the second input terminal are differential input terminals.

9 . The analog front-end device of claim 6 , wherein the tracking circuit comprises:
a sensing circuit configured to generate a first voltage according to the level of the first input terminal and the level of the second input terminal; and a unity-gain buffer circuit configured to set the level of the first predetermined node according to the first voltage, wherein the first predetermined node and the second predetermined node are coupled to each other.

10 . The analog front-end device of claim 9 , wherein the sensing circuit comprises:
a first resistor, wherein a first terminal of the first resistor is coupled to the first input terminal, and a second terminal of the first resistor is configured to output the first voltage; and a second resistor, wherein a first terminal of the second resistor is coupled to the second terminal of the first resistor, and a second terminal of the second resistor is coupled to the second input terminal.

11 . An analog front-end device, comprising:
an amplifier circuit configured to generate a first output signal according to a first input signal; a first gain control circuit configured to set a first electronic component according to a first gain control signal and transmit the first input signal to a first input terminal of the amplifier circuit via the first electronic component, wherein a terminal of the first electronic component is selectively coupled to the first input terminal or a first predetermined node; a tracking circuit configured to adjust a level of the first predetermined node according to a level of the first input terminal, in order to reduce a voltage difference between the first input terminal and the first predetermined node; a deglitch circuit configured to remove a glitch on a first update signal according to a first clock signal to generate a second update signal, generate a second gain control signal according to the first update signal and the first gain control signal, and output the second update signal and the second gain control signal according to the first clock signal; and a latch circuit configured to output the second gain control signal to be a third gain control signal according to the second update signal, wherein the first gain control circuit is configured to set the first electronic component according to the third gain control signal.

12 . The analog front-end device of claim 11 , further comprising:
an analog to digital converter circuit configured to sample the first output signal according to a second clock signal, in order to generate a digital output, wherein a phase difference between the first clock signal and the second clock signal is determined based on a transient error on the first output signal.

13 . The analog front-end device of claim 11 , wherein the latch circuit comprises:
a positive feedback circuit configured to be triggered according to the second update signal to generate a first signal and a second signal according a second bit in the second gain control signal and a first bit, wherein the first bit and the second bit have opposite logic values, and a plurality of output stage circuits configured to output a third bit in the third gain control signal according to the first signal and output a fourth bit that is opposite to the third bit according to the second signal, wherein a pull-up current of each of the plurality of output stage circuits is not equal to a pull-down current of each of the plurality of output stage circuits, and the first gain control circuit is configured to set the first electronic component according to the third bit and the fourth bit.

14 . The analog front-end device of claim 13 , wherein a crossing between the third bit and the f

Assignees

• Realtek Semiconductor Corp

Inventors

• Lin jian-ru
• Lin Kai-Yue
• Chiu Yu-Ting

Classifications

• H03F1/0233

  by using a signal derived from the output signal, e.g. bootstrapping the voltage supply · CPC title

• H03F2200/105

  A non-specified detector of the power of a signal being used in an amplifying circuit · CPC title

• H03G2201/103

  being an amplifying element · CPC title

• H03F3/19

  with semiconductor devices only · CPC title

• H03G3/3036 Primary

  in high-frequency amplifiers or in frequency-changers (H03G3/3052, H03G3/32, H03G3/34 take precedence) · CPC title