Systems and methods for adjusting frame rate of graphics intensive applications based on priority to improve information handling system performance

US12456157B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12456157-B2
Application numberUS-202318130860-A
CountryUS
Kind codeB2
Filing dateApr 4, 2023
Priority dateApr 4, 2023
Publication dateOct 28, 2025
Grant dateOct 28, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Systems and methods are provided that may be implemented on an information handling system to improve the performance of currently-executing target application/s by dynamically adjusting or changing the graphics frame rate (frames per second “FPS”) of other concurrently-executing application/s that are utilizing graphics resources. The disclosed systems and methods may be implemented to use resource sharing (e.g., central processing unit (CPU)/graphics processing unit (GPU) power sharing) in the system to provide more system resources to the system and the target application/s. The disclosed systems and methods may be so implemented to understand which application/s are currently running in the foreground or are predicted to be used and interacted with by the user, and to understand which remaining currently-executing background application/s are graphics intensive.

First claim

Opening claim text (preview).

What is claimed is: 1. An information handling system, comprising: at least one display device; at least one graphics processing unit (GPU) that executes graphics resources; and at least one programmable integrated circuit that is programmed to execute multiple applications concurrently such that each of the concurrently executing multiple applications executes at the same time as each of the other concurrently executing multiple applications and where each of the concurrently executing multiple applications utilizes the graphics resources of the information handling system to display visual images on the display device; where the at least one programmable integrated circuit is further programmed to perform the following while all of the concurrently executing multiple applications are executing and utilizing the graphics resources of the information handling system at the same time to display visual images on the display device: designate each application of a first portion of the concurrently executing multiple applications as a target application for a current user of the information handling system such that a second portion of the concurrently executing multiple applications includes all of the remaining concurrently executing multiple applications that are not designated as target applications and that are not included in the first portion of the concurrently executing multiple applications, and then reduce a graphics frame rate of each application of the second portion of the concurrently executing multiple applications to display visual images on the display device of the information handling system. 2. The information handling system of claim 1 , where the at least one programmable integrated circuit is programmed to detect all of the executing user applications that the current user is currently interacting with in the foreground, and to designate each of the applications of the first portion of the concurrently executing multiple applications as target applications by designating all of the detected executing user applications that the current user is currently interacting with in the foreground as target applications. 3. The information handling system of claim 1 , where the at least one programmable integrated circuit is programmed to determine collective application usage data for the current user that includes the identity and resource utilization of applications that the user has previously interacted with, and to designate each of the applications of the first portion of the concurrently executing multiple applications as target applications by determining the identity of applications that are normally used concurrently by the current user from the collective usage data, and to designate all the determined applications that are normally used concurrently by the current user as target applications. 4. The information handling system of claim 1 , where the graphics frame rate of the second portion of the concurrently executing multiple applications used to display the visual images on the display device of the information handling system is a displayed frames per second (FPS) of the visual images displayed on the display device of the information handling system; and where the at least one programmable integrated circuit is programmed to reduce the displayed FPS of each of the applications of the second portion of the concurrently executing multiple applications to display the visual images on the display device of the information handling system by reducing the displayed FPS of each of the applications of the second portion of the concurrently executing multiple applications by a predetermined FPS amount. 5. The information handling system of claim 1 , where the at least one programmable integrated circuit is programmed to determine collective application usage data for the current user that includes the identity and resource utilization of applications that the user has previously interacted with, and to predict system resource utilization requirements for each of the designated target applications of the first portion of the concurrently executing multiple applications from the collective application usage data for the current user. 6. The information handling system of claim 5 , where the predicted system resource utilization requirements comprise at least one of central processing unit (CPU), graphic processing unit (GPU), or data input/output (I/O) utilization for each of the designated target applications of the first portion of the concurrently executing multiple applications. 7. The information handling system of claim 5 , where the at least one programmable integrated circuit is programmed to use the predicted system resource utilization requirements to determine whether or not sufficient total system resources are available on the information handling system to simultaneously satisfy the predicted system resource utilization requirements of each of the designated concurrently executing target applications of the first portion of the concurrently executing multiple applications when all of the designated target applications are concurrently executing simultaneously with all of the applications of the second portion of the concurrently executing multiple applications executing with the reduced graphics frame rate, and then: simultaneously execute each of the designated target applications of the first portion of the concurrently executing multiple applications with a full non-reduced graphics frame rate if it is determined by the at least one programmable integrated circuit that sufficient total system resources are available to simultaneously satisfy the predicted system resource utilization requirements of all of the designated concurrently executing target applications of the first portion of the concurrently executing multiple applications; and execute one or more of the designated target applications of the first portion of the concurrently executing multiple applications that have a higher priority with a full non-reduced graphics frame rate while at the same time executing one or more of the designated target applications of the first portion of the concurrently executing multiple applications that have a lower priority with a reduced graphics frame rate if it is determined by the at least one programmable integrated circuit that sufficient total system resources are not available to simultaneously satisfy the predicted system resource utilization requirements of each of the designated concurrently executing target applications of the first portion of the concurrently executing multiple applications. 8. The information handling system of claim 5 , where the at least one programmable integrated circuit is programmed to compare the identity of each of the designated target applications of the first portion of the concurrently executing multiple applications to a predefined list of prioritized applications to determine that at least a first one of the designated target applications of the first portion of the concurrently executing multiple applications has priority over at least one second one of the designated target applications of the first portion of the concurrently executing multiple applications, and execute the first designated target application of the first portion of the concurrently executing multiple applications with a full non-reduced graphics frame rate while at the same time executing the second designated target application of the first portion of the concurrently executing multiple applications with a reduced graphics frame rate if it is determined by the at least one programmable integrated circuit that sufficient total system resources are not available to simultaneously satisfy the predicted system resource utilization re

Assignees

Inventors

Classifications

  • Graphics controllers · CPC title

  • Change or adaptation of the frame rate of the video stream · CPC title

  • Power processing, i.e. workload management for processors involved in display operations, such as CPUs or GPUs · CPC title

  • G06T1/20Primary

    Processor architectures; Processor configuration, e.g. pipelining · CPC title

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Frequently asked questions

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What does patent US12456157B2 cover?
Systems and methods are provided that may be implemented on an information handling system to improve the performance of currently-executing target application/s by dynamically adjusting or changing the graphics frame rate (frames per second “FPS”) of other concurrently-executing application/s that are utilizing graphics resources. The disclosed systems and methods may be implemented to use res…
Who is the assignee on this patent?
Dell Products Lp
What technology area does this patent fall under?
Primary CPC classification G06T1/20. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 28 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).