Optoelectronic module package

Patent metadata

Field	Value
Publication number	US-12453210-B2
Application number	US-202217732471-A
Country	US
Kind code	B2
Filing date	Apr 28, 2022
Priority date	Aug 7, 2017
Publication date	Oct 21, 2025
Grant date	Oct 21, 2025

Abstract

An optoelectronic module. In some embodiments, the optoelectronic module includes a substrate; a digital integrated circuit, on an upper surface of the substrate; a photonic integrated circuit, secured in a pocket of the substrate, the pocket being in the upper surface of the substrate; and an analog integrated circuit, on the photonic integrated circuit.

First claim

What is claimed is:

1. An optoelectronic module, comprising:
a substrate having an upper surface and a pocket formed in the upper surface, the pocket extending from a first end of the substrate toward a second end of the substrate along a first direction;
a digital integrated circuit, on the upper surface of the substrate and spaced apart from the pocket along the first direction;
a photonic integrated circuit, secured in the pocket with an epoxy, the photonic integrated circuit:
extending from a first end to a second end along the first direction,
having a V-groove in an upper surface of the photonic integrated circuit at the first end, and
comprising an optoelectronic component connected to a conductive trace on the photonic integrated circuit and bonded into a cavity in the photonic integrated circuit;

an optical fiber having a first end in the V-groove, the optical fiber extending from the first end of the optical fiber away from the photonic integrated circuit and the substrate;
a fiber lid clamping the optical fiber in the V-groove;
a waveguide, for coupling light between the optical fiber and the optoelectronic component;
an analog integrated circuit secured to the upper surface of the photonic integrated circuit via a plurality of copper pillar bumps;
a heater, in or on the photonic integrated circuit; and
a wire bond between the photonic integrated circuit and the substrate, wherein the wire bond forming forms a portion of a conductive path between a conductive trace on the photonic integrated circuit and a circuit in the digital integrated circuit,
wherein a separation between a first copper pillar bump of the plurality of copper pillar bumps and a second copper pillar bump of the plurality of copper pillar bumps is less than 150 microns.

2. The optoelectronic module of claim 1 , wherein the analog integrated circuit is flip-chip mounted on the photonic integrated circuit.

3. The optoelectronic module of claim 2 , wherein a copper pillar bump of the plurality of copper pillar bumps forms a portion of a conductive path between a circuit in the analog integrated circuit and a conductive trace on the photonic integrated circuit.

4. The optoelectronic module of claim 2 , wherein a copper pillar bump of the plurality of copper pillar bumps forms a portion of a conductive path between a circuit in the analog integrated circuit and a circuit in the digital integrated circuit.

5. The optoelectronic module of claim 2 , further comprising underfill between the analog integrated circuit and the photonic integrated circuit.

6. The optoelectronic module of claim 1 , further comprising a conductive trace in the substrate, the conductive trace forming a portion of a conductive path between a conductive trace on the photonic integrated circuit and a circuit in the digital integrated circuit.

7. The optoelectronic module of claim 1 , wherein the optoelectronic component is a photodetector.

8. The optoelectronic module of claim 1 , wherein the optoelectronic component is a modulator.

9. The optoelectronic module of claim 1 , further comprising a heat sink on the analog integrated circuit and on the digital integrated circuit.

10. The optoelectronic module of claim 9 , further comprising a thermal interface material between the heat sink and the analog integrated circuit.

11. The optoelectronic module of claim 1 , wherein the digital integrated circuit is secured and connected to the substrate by a first array of contacts, and
a lower surface of the substrate has a second array of contacts.

12. The optoelectronic module of claim 11 , wherein the second array of contacts has a coarser pitch than the first array of contacts.

Assignees

• Rockley Photonics Ltd

Inventors

• Byrd Gerald Cois
• Schrans Thomas Pierre
• Chou Chia-Te
• Abed Arin
• Bchir Omar James
• Timurdogan Erman
• Zilkie Aaron John

Classifications

• H10W90/401

  characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W20/4424

  Copper alloys · CPC title

• H10F77/933

  for devices having potential barriers · CPC title

• G02B6/428 Primary

  containing printed circuit boards [PCB] · CPC title