Circuit element connection pattern and electronic device having the same

US12446401B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12446401-B2
Application numberUS-202217836152-A
CountryUS
Kind codeB2
Filing dateJun 9, 2022
Priority dateSep 30, 2021
Publication dateOct 14, 2025
Grant dateOct 14, 2025

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A display panel includes a folding axis about which the display panel is foldable, a circuit element layer which is foldable about the folding axis, the circuit element layer including a first transistor including a first semiconductor pattern, a second transistor electrically connected to the first transistor and including a second semiconductor pattern, and the first semiconductor pattern and the second semiconductor pattern on the same layer of the circuit element layer, and a connection pattern which connects the first semiconductor pattern and the second semiconductor pattern to each other, and is on a different layer of the circuit element layer from the same layer on which the first semiconductor pattern and the second semiconductor pattern are disposed, and a light emission element connected to the circuit element layer.

First claim

Opening claim text (preview).

What is claimed is: 1. An electronic device comprising: a display panel; a folding axis about which the display panel is foldable; a circuit element layer which is foldable about the folding axis, the circuit element layer including: a plurality of transistors including: a first transistor including a first semiconductor pattern; a second transistor electrically connected to the first transistor and including a second semiconductor pattern; and the first semiconductor pattern and the second semiconductor pattern on the same layer of the circuit element layer, a connection pattern which is in a same material layer and extends continuously between the first semiconductor pattern and the second semiconductor pattern to electrically connect the first transistor and the second transistor to each other, and the connection pattern on a different layer of the circuit element layer from the same layer on which the first semiconductor pattern and the second semiconductor pattern are disposed; and a light emission element connected to the circuit element layer. 2. The electronic device of claim 1 , wherein the connection pattern comprises molybdenum, aluminum, copper or an alloy thereof. 3. The electronic device of claim 1 , wherein the circuit element layer further includes: a capacitor including: a first electrode on the first semiconductor pattern, and a second electrode facing the first semiconductor pattern with the first electrode therebetween; and the connection pattern on a different layer of the circuit element layer from layers on which the first electrode and the second electrode are disposed. 4. The electronic device of claim 3 , wherein the first electrode of the capacitor comprises: a first portion overlapping the first semiconductor pattern to define a gate electrode of the first transistor; and a second portion overlapping the second electrode of the capacitor. 5. The electronic device of claim 1 , wherein the plurality of transistors further includes a third transistor including a third semiconductor pattern on a different layer of the circuit element layer from a layer on which the first semiconductor pattern is disposed. 6. The electronic device of claim 5 , wherein the circuit element layer further includes a connection electrode which is electrically connected to a source of the third semiconductor pattern of the third transistor and to a gate electrode of the first transistor. 7. The electronic device of claim 6 , wherein within the circuit element layer, the connection pattern is on a different layer of the circuit element layer from a layer on which the connection electrode is disposed. 8. The electronic device of claim 6 , wherein within the circuit element layer, the connection electrode overlaps an entirety of the source of the third semiconductor pattern of the third transistor. 9. The electronic device of claim 5 , wherein within the circuit element layer, the third transistor comprises a gate electrode overlapping the third semiconductor pattern, and the connection pattern, and the gate electrode of the third transistor, are disposed on the same layer of the circuit element layer. 10. The electronic device of claim 9 , wherein the circuit element layer further includes: a signal line connected to the gate electrode of the third transistor, and the signal line crossing the connection pattern. 11. The electronic device of claim 5 , wherein within the plurality of transistors, each of the first semiconductor pattern, the second semiconductor pattern and the third semiconductor pattern comprises polysilicon or a metal oxide. 12. The electronic device of claim 1 , wherein the circuit element layer further includes: the plurality of transistors further including: a third transistor including a third semiconductor pattern; a fourth transistor electrically connected to the third transistor and including a fourth semiconductor pattern; and the third semiconductor pattern and the fourth semiconductor pattern on the same layer of the circuit element layer, the connection pattern defining a first connection pattern extending continuously between the first semiconductor pattern and the second semiconductor pattern to connect the first transistor and the second transistor to each other; and a second connection pattern connecting the third semiconductor pattern and the fourth semiconductor pattern to each other. 13. The electronic device of claim 12 , wherein the light emission element which is connected to the circuit element layer includes an anode and a cathode, and the circuit element layer further includes a connection electrode which electrically connects the second connection pattern, and the anode of the light emission element, to each other. 14. The electronic device of claim 12 , wherein the circuit element layer further includes: an initialization line which is electrically connected to the fourth transistor and receives an initialization voltage, and the initialization line crossing the second connection pattern. 15. An electronic device comprising: a display panel comprising: a pixel; a scan line which provides a gate voltage to the pixel; a data line which provides a data voltage to the pixel; a first power line which provides a first power voltage to the pixel; and a second power line which provides a second power voltage to the pixel, wherein the pixel of the display panel includes: a capacitor connected to the first power line; a first transistor connected to the capacitor; a second transistor connected to the first transistor, to the scan line and to the data line; a semiconductor pattern of the first transistor and a semiconductor pattern of the second transistor on the same layer within the pixel; a light emission element connected to the second power line; and a first connection pattern which is in a same material layer and extends continuously between the semiconductor patterns to electrically connect the first and second transistors to each other, and is on a different layer within the pixel from a layer on which the semiconductor pattern of the first transistor is disposed. 16. The electronic device of claim 15 , further comprising: a first initialization line which provides a first initialization voltage to the pixel; and a first signal line which provides a light emission control signal to the pixel, wherein the pixel further includes: a third transistor connected to the light emission element and to the first signal line; a fourth transistor connected to the third transistor and to the first initialization line; a semiconductor pattern of the third transistor and a semiconductor pattern of the fourth transistor on the same layer within the pixel; and a second connection pattern which connects the semiconductor patterns of the third and fourth transistors to each other, and is on a different layer within the pixel from a layer on which the semiconductor pattern of the third transistor is disposed. 17. The electronic device of claim 16 , further comprising a second initialization line which provides a second initialization voltage to the pixel, wherein the pixel further includes: a fifth transistor connected to the first transistor and comprising a semiconductor pattern and a source; a sixth transistor connected to the fifth transistor and to the second initialization line; a seventh transistor connected to the first power line and to the first transistor; and a connection electrode which connects the capacitor and the fifth transistor to each other, overlap

Assignees

Inventors

Classifications

  • Flexible OLED · CPC title

  • the pixel elements being capacitors · CPC title

  • H10K59/131Primary

    Interconnections, e.g. wiring lines or terminals · CPC title

  • Interconnections, e.g. scanning lines · CPC title

  • wherein the TFTs are in active matrices · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12446401B2 cover?
A display panel includes a folding axis about which the display panel is foldable, a circuit element layer which is foldable about the folding axis, the circuit element layer including a first transistor including a first semiconductor pattern, a second transistor electrically connected to the first transistor and including a second semiconductor pattern, and the first semiconductor pattern and…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/131. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 14 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).