Ramp signal generator for calibrating ramp linearity, operating method thereof, and image sensor device including the same

Patent metadata

Field	Value
Publication number	US-12439183-B2
Application number	US-202318141164-A
Country	US
Kind code	B2
Filing date	Apr 28, 2023
Priority date	Oct 25, 2022
Publication date	Oct 7, 2025
Grant date	Oct 7, 2025

Abstract

Disclosed is a ramp signal generator. The ramp signal generator includes: a first unit current source including first sub-unit current sources, and configured to output a first unit current during a first time period; and a second unit current source including second sub-unit current sources, and configured to output a second unit current during a second time period. The first sub-unit current sources are configured to operate according to first sub-ramp control signals, respectively. The second sub-unit current sources are configured to operate according to second sub-ramp control signals, respectively. n first sub-ramp control signals among the first sub-ramp control signals are activated, and m sub-ramp control signals among the second sub-ramp control signals are activated, n and m being different natural numbers.

First claim

What is claimed is:

1. A ramp signal generator comprising:
a first unit current source comprising a plurality of first sub-unit current sources connected to a first unit current output node, and configured to output a first unit current during a first time period;
a first ramp switch connected between the first unit current output node and an output node;
a second unit current source comprising a plurality of second sub-unit current sources connected to a second unit current output node, and configured to output a second unit current during a second time period; and
a second ramp switch connected between the second unit current output node and the output node,
wherein the plurality of first sub-unit current sources are configured to operate according to a plurality of first sub-ramp control signals, respectively,
wherein the plurality of second sub-unit current sources are configured to operate according to a plurality of second sub-ramp control signals, respectively, and
wherein n first sub-ramp control signals among the plurality of first sub-ramp control signals are activated, and m sub-ramp control signals among the plurality of second sub-ramp control signals are activated, n and m being different natural numbers that are determined based on a difference between a reference ramp signal and a target ramp signal.

2. The ramp signal generator of claim 1 , wherein n corresponds to a magnitude of the first unit current, and
wherein m corresponds to a magnitude of the second unit current.

3. The ramp signal generator of claim 1 , wherein the ramp signal generator is configured to generate a ramp signal having a voltage level that changes from a first value to a second value;
wherein the reference ramp signal is generated when k first sub-ramp control signals among the plurality of first sub-ramp control signals and k second sub-ramp control signals among the plurality of second sub-ramp control signals are activated, k being a natural number, and
wherein the target ramp signal has a voltage level that changes linearly from the first value to the second value.

4. The ramp signal generator of claim 3 , wherein the ramp signal generator comprises a first unit current source array and a second unit current source array,
wherein the first unit current source array comprises the first unit current source, and the second unit current source array comprises the second unit current source,
wherein the first unit current source array is configured to receive the plurality of first sub-ramp control signals, and
wherein the second unit current source array is configured to receive the plurality of second sub-ramp control signals.

5. The ramp signal generator of claim 4 , further comprising a bias circuit configured to output a first bias signal and a second bias signal to the plurality of first sub-unit current sources and the plurality of second sub-unit current sources.

6. The ramp signal generator of claim 5 , wherein each of the plurality of first sub-unit current sources comprises:
a first p-channel metal oxide semiconductor (PMOS) transistor, a second PMOS transistor, and a first switching element connected in series between a power node and the first unit current output node,
wherein the first PMOS transistor operates based on the first bias signal,
wherein the second PMOS transistor operates based on the second bias signal,
wherein the first switching element is turned on or turned off according to a first sub-ramp control signal, from among the plurality of first sub-ramp control signals, corresponding to each of the plurality of first sub-unit current sources,
wherein the ramp signal is formed at the output node, and
wherein the first ramp switch is turned on or turned off according to a first ramp control signal.

7. The ramp signal generator of claim 6 , wherein the ramp signal generator further comprises:
a variable resistor connected between the output node at which the ramp signal is formed and a ground node, and
wherein a slope of the ramp signal is proportional to a magnitude of the variable resistor.

8. The ramp signal generator of claim 7 , wherein the first unit current source further comprises a second switching element connected between the first unit current output node and the ground node, and
wherein the second switching element is turned on or turned off based on a ramp end signal.

9. The ramp signal generator of claim 3 , wherein, during the first time period, an absolute value of a slope of the target ramp signal is greater than an absolute value of a slope of the reference ramp signal, and
wherein the n is greater thank.

10. The ramp signal generator of claim 9 , wherein, during the second time period, the absolute value of the slope of the target ramp signal is smaller than the absolute value of the slope of the reference ramp signal, and
wherein the m is smaller thank.

11. The ramp signal generator of claim 10 , further comprising:
a third unit current source comprising a plurality of third sub-unit current sources, and configured to output a third unit current during a third time period,
wherein the plurality of third sub-unit current sources are configured to operate according to a plurality of third sub-ramp control signals, respectively,
wherein k third sub-ramp control signals among the plurality of third sub-ramp control signals are activated,
wherein the reference ramp signal is generated when the k first sub-ramp control signals, the k second sub-ramp control signals and the k third sub-ramp control signals among the plurality of third sub-ramp control signals are activated, and
wherein, during the third time period, the absolute value of the slope of the target ramp signal is equal to the absolute value of the slope of the reference ramp signal.

12. The ramp signal generator of claim 1 , wherein n and m are determined based on the difference between the reference ramp signal and the target ramp signal in a pre-test section.

13. An image sensor device comprising:
a pixel array configured to output pixel signals corresponding to an image;
a ramp signal generator configured to output a ramp signal;
an analog-to-digital converter configured to receive the pixel signals from the pixel array and to receive the ramp signal from the ramp signal generator; and
a sensor controller configured to control the ramp signal generator, and to generate a plurality of first sub-ramp control signals and a plurality of second sub-ramp control signals,
wherein the ramp signal generator comprises:
a first unit current source comprising a plurality of first sub-unit current sources, and configured to output a first unit current during a first time period; and
a second unit current source comprising a plurality of second sub-unit current sources, and configured to output a second unit current during a second time period,

wherein the plurality of first sub-unit current sources are configured to operate according to the plurality of first sub-ramp control signals, respectively,
wherein the plurality of second sub-unit current sources are configured to operate according to the plurality of second sub-ramp control signals, respectively, and
wherein n first sub-ramp control signals among the plurality of first sub-ramp control signals are activated, and m sub-ramp control signals among the plurality of second sub-ramp control signals are activated, n and m being different natural numbers.

14. The image sensor device of claim 13 , wherein the ramp signal generator is configured to control a voltage level of the ramp signal to change from a first value to a second value;
wherein n and

Assignees

• Samsung Electronics Co Ltd

Inventors

• Han Dongjae
• Jung Haneul
• Yoon Younghyun

Classifications

• H03K4/48

  using as active elements semiconductor devices (H03K4/787 - H03K4/84 take precedence) · CPC title

• H04N25/616

  involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling · CPC title

• H04N25/766

  comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power · CPC title

• H04N25/78 Primary

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

• H04N25/75 Primary

  Circuitry for providing, modifying or processing image signals from the pixel array · CPC title