Method for testing and evaluating short-circuit withstand capability of press-pack power component

US12436204B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12436204-B2
Application numberUS-202318484486-A
CountryUS
Kind codeB2
Filing dateOct 11, 2023
Priority dateNov 1, 2022
Publication dateOct 7, 2025
Grant dateOct 7, 2025

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Disclosed is a method for testing and evaluating a short-circuit withstand capability of a press-pack power component. The method includes: building a test platform; obtaining a voltage level, a pressure load, an environment temperature, and a maximum junction temperature fluctuation range of a to-be-tested component in an actual working condition; separately testing short-circuit withstand capabilities of the to-be-tested press-pack power component; monitoring, in real time, changes of a component short-circuit current, a collector-emitter voltage, and a grid-emitter voltage until the to-be-tested press-pack power component fails due to short circuit; correspondingly obtaining a relationship between a voltage and each of a short-circuit critical energy and a critical temperature, a relationship between a pressure and a short-circuit current, and a relationship between a temperature and a short-circuit current; obtaining a relationship between a short-circuit withstand capability of the to-be-tested press-pack power component and each of a voltage, a pressure, and a temperature.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for testing and evaluating a short-circuit withstand capability of a press-pack power component, wherein the method comprises the following steps: S1: building a test platform suitable for a short-circuit withstand capability of a press-pack power component; S2: obtaining a voltage level, a pressure load, an environment temperature, and a maximum junction temperature fluctuation range of a to-be-tested press-pack power component in an actual working condition; S3: customizing a test scheme of the short-circuit withstand capability, which comprises: separately testing short-circuit withstand capabilities of the to-be-tested press-pack power component at different voltage, pressure, and temperature levels; monitoring, in real time, changes of a component short-circuit current I S , a collector-emitter voltage V CE , and a grid-emitter voltage V GE until the to-be-tested press-pack power component fails due to short circuit; and correspondingly obtaining a relationship between a voltage and each of a short-circuit critical energy E CR and a critical temperature T CR , a relationship between a pressure and a short-circuit current, and a relationship between a temperature and a short-circuit current; and S4: obtaining, according to test results obtained under different voltages, pressures, and temperatures, a relationship between a short-circuit withstand capability of the to-be-tested press-pack power component and each of a voltage, a pressure, and a temperature. 2. The method for testing and evaluating a short-circuit withstand capability of a press-pack power component according to claim 1 , wherein in step S1, the test platform comprises a short-circuit energy supply module, a control module, a measurement module, and an environment control module; the short-circuit energy supply module comprises a high-voltage direct current (DC) power supply and a capacitor group that are connected in parallel, to provide impact energy for a short-circuit withstand test; the control module comprises a signal generator and a drive circuit that are connected in series, to control a to-be-tested module to be enabled; the measurement module comprises a voltage probe and a current probe, to monitor and acquire a short-circuit current I S , a collector-emitter voltage V CE , a grid-emitter voltage V GE in a process of the short-circuit withstand test; and the environment control module comprises a high-voltage DC power supply, a pressure fixture, and a constant-temperature experimental box, to respectively control changes of a voltage, a pressure, and a temperature. 3. The method for testing and evaluating a short-circuit withstand capability of a press-pack power component according to claim 1 , wherein in step S2, a test voltage U i , a test pressure F i , and a test temperature T i are determined according to the actual working condition of the to-be-tested press-pack power component, wherein the test voltage U i uses an actual working voltage U 0 as a reference, and ±10% as a step, and testing is performed at least at 5 voltage levels, namely, U 0 −20%, U 0 −10%, U 0 , U 0 +10%, and U 0 +20%; the test pressure F i uses a recommended pressure load value F 0 of the to-be-tested press-pack power component in the actual working condition as a reference, and a maximum pressure load value F 0-max as an upper limit; within the test pressure F i ∈(0, F 0 ] interval, testing is performed at least at 5 pressure levels within (0, F 0 /2] interval, testing is performed at least at 3 pressure levels; and within the test pressure F i ∈(F 0 , F 0-max ] interval, testing is performed at least at 2 pressure levels; and the test temperature T i includes one or more values between TEN min in actual application as a lower limit, and a maximum junction temperature T j_max as an upper limit; a minimum value T j_min of junction temperature fluctuation in the application working condition is comprised, and testing is performed at least at 4 temperature levels. 4. The method for testing and evaluating a short-circuit withstand capability of a press-pack power component according to claim 1 , wherein in step S3, a short-circuit current I S and a collector-emitter voltage V CE are monitored in real time in a process of testing the short-circuit withstand capability, and when the short-circuit current I S instantly rises to at least 2 times an initial value and the collector-emitter voltage V CE drops rapidly to about 0 V, it is determined that the to-be-tested press-pack power component fails due to short circuit. 5. The method for testing and evaluating a short-circuit withstand capability of a press-pack power component according to claim 1 , wherein in step S3, the testing short-circuit withstand capabilities of the to-be-tested press-pack power component at different voltage levels comprises: separately testing a short-circuit withstand capability of the to-be-tested press-pack power component at a selected voltage level, and monitoring, in real time, a component short-circuit current I S , a collector-emitter voltage V CE , and a grid-emitter voltage V GE until the to-be-tested press-pack power component fails due to short circuit; (1) calculating a short-circuit critical energy E CR of the to-be-tested press-pack power component based on the short-circuit current I S and the collector-emitter voltage V CE : E CR =∫ 0 t SCWC V CE ( t )· I S ( t )· dt , wherein t SCWC is a short-circuit withstand time of the to-be-tested press-pack power component, namely, a maintenance time from a beginning of testing to a short-circuit failure of the to-be-tested press-pack power component; (2) fitting a relationship between a test voltage U i and a short-circuit critical energy E CR based on the test results at the different voltage levels: E CR =f E ( U i ), wherein f E (U i ) is a fitting relationship function between a test voltage U i and a short-circuit critical energy E CR ; and (3) obtaining a relationship between a test voltage U i and a critical temperature T CR : T CR ( U i ) = f E ( U i ) K chip + T EN , wherein K chip is a parameter related to a material and a structure of a chip used by the to-be-tested press-pack power component, and T EN is the environment temperature. 6. The method for testing and evaluating a short-circuit withstand capability of a press-pack power component according to claim 1 , wherein in step S3, the testing short-circuit withstand capabilities of the to-be-tested press-pack power component at different pressure levels comprises: separately testing a short-circuit withstand capability of the to-be-tested press-pack power component at a selected pressure level, and monitoring, in real time, changes of a component short-circuit current I S , a collector-emitter vo

Assignees

Inventors

Classifications

  • Apparatus or methods therefor (G01R31/2607, G01R31/2642 take precedence) · CPC title

  • for measuring thermal properties thereof · CPC title

  • G01R31/52Primary

    Testing for short-circuits, leakage current or ground faults · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12436204B2 cover?
Disclosed is a method for testing and evaluating a short-circuit withstand capability of a press-pack power component. The method includes: building a test platform; obtaining a voltage level, a pressure load, an environment temperature, and a maximum junction temperature fluctuation range of a to-be-tested component in an actual working condition; separately testing short-circuit withstand cap…
Who is the assignee on this patent?
Univ Chongqing
What technology area does this patent fall under?
Primary CPC classification G01R31/52. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 07 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).