Method for generating patterning device pattern at patch boundary

US12430490B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12430490-B2
Application numberUS-202318382822-A
CountryUS
Kind codeB2
Filing dateOct 23, 2023
Priority dateDec 28, 2018
Publication dateSep 30, 2025
Grant dateSep 30, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for generating a mask pattern to be employed in a patterning process. The method including obtaining (i) a first feature patch including a first polygon portion of an initial mask pattern, and (ii) a second feature patch including a second polygon portion of the initial mask pattern; adjusting the second polygon portion at a patch boundary between the first feature patch and the second feature patch such that a difference between the first polygon portion and the second polygon portion at the patch boundary is reduced; and combining the first polygon portion and the adjusted second polygon portion at the patch boundary to form the mask pattern.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of determining a mask pattern to be employed in a patterning process, the method comprising: obtaining (i) a first feature patch comprising a first portion associated with an initial mask pattern image, and (ii) a second feature patch comprising a second portion associated with the initial mask pattern image; adjusting, by a hardware computer system, the second portion at a patch boundary between the first feature patch and the second feature patch such that a difference between the first portion and the second portion at the patch boundary is reduced; and combining the first portion and the adjusted second portion at the patch boundary to form the mask pattern. 2. The method of claim 1 , further comprising: adjusting the first portion at the patch boundary between the first feature patch and the second feature patch such that the difference between the first portion and the second portion at the patch boundary is reduced; and determining the mask pattern to include a combination of the adjusted first portion and the second portion at the patch boundary. 3. The method of claim 1 , wherein the adjusting of the first portion and/or the second portion comprises determining a stitching function configured to seamlessly join, at the patch boundary, the first portion and the second portion, wherein the stitching function is a mathematical shaping function that reduces the difference between the first portion and the second portion at the patch boundary. 4. The method of claim 1 , wherein the initial mask pattern comprises a plurality of patches arranged in a sequence, each patch having a priority value within the sequence. 5. The method of claim 1 , comprising an iterative process, an iteration thereof comprising: selecting a patch within a sequence of a plurality of patches comprising the first and second feature patches, each patch having a priority value; adjusting a portion within the selected patch and/or another portion within an adjacent patch of the selected patch such that the difference between the portions is reduced; and generating the mask pattern by combining one or more patches having same priorities with corresponding adjacent one or more patches of the plurality of patches. 6. The method of claim 1 , wherein the initial mask pattern and/or the mask pattern is a curvilinear mask pattern. 7. A non-transitory computer program product comprising machine-readable instructions therein, the instructions, when executed by one or more processors, are configured to cause the one or more processors to at least: obtain (i) a first feature patch comprising a first portion associated with an initial mask pattern image, and (ii) a second feature patch comprising a second portion associated with the initial mask pattern image; adjust the second portion at a patch boundary between the first feature patch and the second feature patch such that a difference between the first portion and the second portion at the patch boundary is reduced; and combine the first portion and the adjusted second portion at the patch boundary to form a mask pattern to be employed in a patterning process. 8. The non-transitory computer program product of claim 7 , wherein the instructions are further configured to cause the one or more processors to: adjust the first portion at the patch boundary between the first feature patch and the second feature patch such that the difference between the first portion and the second portion at the patch boundary is reduced; and determine the mask pattern to include a combination of the adjusted first portion and the second portion at the patch boundary. 9. The non-transitory computer program product of claim 7 , wherein the instructions configured to cause the one or more processors to adjust of the first portion and/or the second portion are further configured to cause the one or more processors to determine a stitching function configured to seamlessly join, at the patch boundary, the first portion and the second portion, wherein the stitching function is a mathematical shaping function that reduces the difference between the first portion and the second portion at the patch boundary. 10. The non-transitory computer program product of claim 7 , wherein the initial mask pattern comprises a plurality of patches arranged in a sequence, each patch having a priority value within the sequence. 11. The non-transitory computer program product of claim 7 , wherein the instructions are further configured to cause the one or more processors to perform an iterative process, an iteration thereof comprising: selection of a patch within a sequence of a plurality of patches comprising the first and second feature patches, each patch having a priority value; adjustment of a portion within the selected patch and/or another portion within an adjacent patch of the selected patch such that the difference between the portions is reduced; and generation of the mask pattern by combination of one or more patches having same priorities with corresponding adjacent one or more patches of the plurality of patches. 12. The non-transitory computer program product of claim 7 , wherein the initial mask pattern and/or the mask pattern is a curvilinear mask pattern.

Assignees

Inventors

Classifications

  • Manufacturability analysis or optimisation for manufacturability · CPC title

  • Optical proximity correction [OPC] · CPC title

  • G03F1/70Primary

    Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging · CPC title

  • Testing or measuring features, e.g. grid patterns, focus monitors, sawtooth scales or notched scales · CPC title

  • G03F1/36Primary

    Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes · CPC title

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What does patent US12430490B2 cover?
A method for generating a mask pattern to be employed in a patterning process. The method including obtaining (i) a first feature patch including a first polygon portion of an initial mask pattern, and (ii) a second feature patch including a second polygon portion of the initial mask pattern; adjusting the second polygon portion at a patch boundary between the first feature patch and the second…
Who is the assignee on this patent?
Asml Netherlands Bv
What technology area does this patent fall under?
Primary CPC classification G03F1/70. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 30 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).