Semiconductor device

Patent metadata

Field	Value
Publication number	US-12424503-B2
Application number	US-202217697195-A
Country	US
Kind code	B2
Filing date	Mar 17, 2022
Priority date	Oct 8, 2019
Publication date	Sep 23, 2025
Grant date	Sep 23, 2025

Abstract

A semiconductor device includes a semiconductor element, a sealing body, and a plurality of terminals. The sealing body seals the semiconductor element therein. The terminals are electrically connected to the semiconductor element inside of the sealing body, and project from the sealing body. Each of the terminals has a rough surface area having a larger surface roughness than a peripheral area in a section in a longitudinal direction of the terminal.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor element;
a sealing body that seals the semiconductor element therein; and
a plurality of terminals that are electrically connected to the semiconductor element inside the sealing body, and project from the sealing body,
wherein
each of the plurality of terminals has a rough surface area in a section in a longitudinal direction on a surface of the terminal and a peripheral area on a periphery of the rough surface area in the longitudinal direction on the surface, the surface being parallel to a main surface of the sealing body, the rough surface area having a larger surface roughness than the peripheral area,
a distance between the rough surface area and the sealing body is smaller than a dimension of a base end of the terminal in a width direction of the terminal,
the rough surface area is in contact with the sealing body,
the rough surface area extends from an inside of the sealing body to an outside of the sealing body, and
the terminal has a step portion depressed from the peripheral area at a boundary of the rough surface area on the surface of the terminal.

2. The semiconductor device according to claim 1 , wherein
in the section of the terminal, the rough surface area is disposed at least at a part in the width direction on the surface of the terminal.

3. The semiconductor device according to claim 2 , wherein
the rough surface area is disposed to be contiguous to a side end of the terminal in the width direction on the surface of the terminal.

4. The semiconductor device according to claim 2 , wherein
the rough surface area is disposed to be contiguous to both side ends of the terminal in the width direction on the surface of the terminal.

5. The semiconductor device according to claim 2 , wherein
the rough surface area includes a first part contiguous to a side end of the terminal and a second part contiguous to an opposite side end of the terminal in the width direction on the surface of the terminal, and
the first part and the second part are separate from each other in the width direction of the terminal.

6. The semiconductor device according to claim 2 , wherein
the rough surface area is disposed separate from both side ends of the terminal in the width direction on the surface of the terminal.

7. The semiconductor device according to claim 1 , wherein
the plurality of terminals have the rough surface areas at a same position in the longitudinal direction.

8. The semiconductor device according to claim 1 , wherein
a dimension of the rough surface area in the longitudinal direction is smaller than the dimension of the base end of the terminal in the width direction of the terminal.

9. The semiconductor device according to claim 8 , wherein
each of the plurality of terminals has a metal plating film on the surface thereof.

10. The semiconductor device according to claim 9 , wherein
the rough surface area is provided by an oxidized portion of the metal plating film.

11. The semiconductor device according to claim 1 , wherein
the rough surface area has one of a triangular shape, a rectangular shape, a circular shape, and a wavy line shape.

12. The semiconductor device according to claim 1 , wherein
the semiconductor element includes a plurality of signal terminals electrically connected to signal electrodes of the semiconductor element, and
the plurality of terminals are the plurality of signal terminals.

13. The semiconductor device according to claim 1 , wherein
the semiconductor element is a power semiconductor element.

14. A semiconductor device comprising:
a semiconductor element;
a sealing body that seals the semiconductor element therein; and
a plurality of terminals that are electrically connected to the semiconductor element inside the sealing body, and project from the sealing body, wherein
each of the plurality of terminals has a rough surface area in a section in a longitudinal direction on a surface of the terminal and a peripheral area on a periphery of the rough surface area in the longitudinal direction on the surface, the surface being parallel to a main surface of the sealing body, the rough surface area having a larger surface roughness than the peripheral area, and
the terminal has a step portion depressed from the peripheral area at a boundary of the rough surface area on the surface.

Assignees

• Denso Corp

Inventors

• Hirano Takahiro
• Sugiura Shun
• Ooshima Masanori

Classifications

• H10W90/766

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/871

  Bond wires and strap connectors · CPC title