Spatially selective roughening of encapsulant to promote adhesion with functional structure

Patent metadata

Field	Value
Publication number	US-10347554-B2
Application number	US-201715462858-A
Country	US
Kind code	B2
Filing date	Mar 19, 2017
Priority date	Mar 21, 2016
Publication date	Jul 9, 2019
Grant date	Jul 9, 2019

Abstract

An electronic component which comprises an electrically conductive carrier, an electronic chip on the carrier, an encapsulant encapsulating at least part of at least one of the carrier and the electronic chip, and a functional structure covering a surface portion of the encapsulant, wherein at least part of the covered surface portion of the encapsulant is spatially selectively roughened.

First claim

What is claimed is:

1. An electronic component, the electronic component comprising:
an electrically conductive carrier;
an electronic chip on the carrier;
an encapsulant encapsulating at least part of at least one of the carrier and the electronic chip;
a functional structure covering a surface portion of the encapsulant;
a discontinuity which is formed in the surface portion of the encapsulant covered by the functional structure;
wherein at least part of the covered surface portion of the encapsulant is spatially selectively roughened.

2. The electronic component according to claim 1 , wherein the roughened surface of the encapsulant has a uniform roughness profile.

3. The electronic component according to claim 2 , wherein the roughened surface of the encapsulant has a roughness of at least 1 μm, in particular in a range between 1 μm and 10 μm, more particularly in a range between 2 μm and 4 μm.

4. The electronic component according to claim 1 , wherein the discontinuity is formed as an annular indentation in the surface portion of the encapsulant covered by the functional structure.

5. The electronic component according to claim 1 , wherein the roughened surface of the encapsulant is selectively located only adjacent to, in particular surrounding, at least part of the discontinuity.

6. The electronic component according to claim 1 , wherein the roughened surface of the encapsulant has a locally limited higher roughness than another lower roughness at a remaining surface of the encapsulant covered by the functional structure.

7. The electronic component according to claim 1 , wherein the functional structure is an electrically insulating and thermally conductive interface structure.

8. The electronic component according to claim 7 , wherein the electronic component further comprises a heat dissipation body attached or to be attached to the interface structure for dissipating heat generated by the electronic chip during operation of the electronic component.

9. The electronic component according to claim 1 , wherein the electronic chip is configured as at least one of the group consisting of:
a power semiconductor chip; and
an electronic chip with vertical current flow.

10. The electronic component according to claim 1 , wherein the functional structure is an optically transparent structure.

11. The electronic component according to claim 1 , wherein the functional structure is a magnetic structure, in particular a permanent magnetic structure, more particularly a ferromagnetic structure.

12. The electronic component according to claim 1 , wherein the functional structure is configured to provide for a mechanical decoupling of a microelectromechanical structure, in particular with a low Young modulus.

13. The electronic component according to claim 1 , wherein the encapsulant comprises a first mold compound and the functional structure comprises a second mold compound.

14. A method of manufacturing an electronic component, the method comprising:
mounting an electronic chip on an electrically conductive carrier;
encapsulating at least part of at least one of the carrier and the electronic chip by an encapsulant;
spatially selectively roughening a surface portion of the encapsulant to thereby form a spatially selectively roughened surface, the roughening is carried out during the encapsulating using an encapsulation tool having, in relation to the roughened surface, an inverse roughened surface;
covering at least part of the roughened surface of the encapsulant by a functional structure.

15. The method according to claim 14 , wherein the method comprises, after the spatially selective roughening, at least one of the group consisting of plasma treating and cleaning the roughened surface of the encapsulant.

16. The method according to claim 14 , wherein the encapsulation tool is a molding tool, and wherein the roughening is carried out during molding the encapsulant in the molding tool.

17. A method of manufacturing a component, the method comprising:
forming an encapsulant, in particular a first mold compound;
covering a surface portion of the encapsulant by a functional structure, in particular a second mold compound;
wherein only a sub-portion of the covered surface portion of the encapsulant is roughened, and wherein the roughening is carried out during the encapsulating using an encapsulation tool, in particular a molding tool, having, in relation to the roughened surface, an inverse roughened surface.

18. An apparatus for manufacturing a component with an encapsulant having a spatially selectively roughened surface, the apparatus comprising:
an encapsulation tool having an accommodation space configured for forming an encapsulant;
wherein the encapsulation tool has an, in relation to the roughened surface of the encapsulant to be formed, inverse roughened surface delimiting part of the accommodation space so that, when a preform of the encapsulant is filled in the accommodation space and is solidified, the encapsulant is formed with the roughened surface in a region corresponding to the inverse roughened surface.

19. The apparatus according to claim 18 , wherein the accommodation space is configured for accommodating a chip carrier and an electronic chip mounted on the chip carrier and configured for forming the encapsulant encapsulating at least part of at least one of the chip carrier and the electronic chip.

20. The apparatus according to claim 18 , further comprising a functional structure formation tool configured for forming a functional structure covering a surface portion, including the roughened surface, of the formed encapsulant.

Assignees

• Infineon Technologies Ag

Inventors

• Santos Norbert Joson
• Fuergut Edward
• Murugan Sanjay Kumar

Classifications

• H10P95/08

  Planarisation of organic insulating materials · CPC title

• H10P72/0441

  Apparatus for sealing, encapsulating, glassing, decapsulating or the like · CPC title

• H10P70/23

  during, before or after processing of insulating materials · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title