Techniques and device structures based upon directional dielectric deposition and bottom-up fill

Patent metadata

Field	Value
Publication number	US-12422210-B2
Application number	US-202217893559-A
Country	US
Kind code	B2
Filing date	Aug 23, 2022
Priority date	Nov 11, 2019
Publication date	Sep 23, 2025
Grant date	Sep 23, 2025

Abstract

Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component). In some embodiments, a method may include providing a plurality of device structures extending from a base, each of the plurality of device structures including a first sidewall opposite a second sidewall and a top surface extending between the first and second sidewalls, and providing a seed layer over the plurality of device structures. The method may further include forming a dielectric layer along just the top surface and along an upper portion of the first and second sidewalls using an angled deposition delivered to the plurality of device structures at a non-zero angle of inclination relative to a perpendicular extending from an upper surface of the base, and forming a fill material within one or more trenches defined by the plurality of device structures.

First claim

What is claimed is:

1. A method, comprising:
providing a plurality of device structures extending from a base, each of the plurality of device structures including a first sidewall opposite a second sidewall;
forming a dielectric layer along just a top surface of each of the plurality of device structures and along an upper portion of the first and second sidewalls using an angled deposition delivered to the plurality of device structures at a non-zero angle of inclination relative to a perpendicular extending from an upper surface of the base; and
forming a fill material within one or more trenches defined by the plurality of device structures.

2. The method of claim 1 , further comprising providing a seed layer over the plurality of device structures.

3. The method of claim 1 , further comprising depositing a second fill material over the fill material.

4. The method of claim 3 , further comprising planarizing the second fill material and the plurality of device structures to remove the seed layer from the top surface of each of the plurality of device structures.

5. The method of claim 1 , wherein the fill material is formed using a bulk atomic layer deposition process or a bulk chemical vapor deposition process, and wherein the fill material is formed just along a lower portion of the first and second sidewalls.

6. The method of claim 1 , wherein the fill material is not formed over the dielectric layer.

7. The method of claim 1 , wherein forming the dielectric layer comprises depositing a dielectric material using a plasma enhanced chemical vapor deposition process.

8. The method of claim 1 , further comprising etching the plurality of device structures to remove the dielectric layer from the top surface of each of the plurality of device structures.

9. A method of forming a semiconductor device, comprising:
providing a plurality of device structures extending vertically from a base, each of the plurality of device structures including a first sidewall opposite a second sidewall;
providing a seed layer over the first sidewall and the second sidewall; and
forming a dielectric layer atop the seed layer, wherein the dielectric layer is formed along just a top surface of each of the plurality of device structures and along an upper portion of the first and second sidewalls using an angled dielectric material deposition delivered to the plurality of device structures at a non-zero angle of inclination relative to a perpendicular extending from an upper surface of the base.

10. The method of claim 9 , further comprising depositing a fill material within one or more trenches defined by the plurality of device structures, wherein the fill material is inhibited from being formed along the dielectric layer.

11. The method of claim 10 , wherein the fill material is formed just along a lower portion of the first and second sidewalls.

12. The method of claim 10 , further comprising forming the dielectric layer using a plasma enhanced chemical vapor deposition process.

13. The method of claim 10 , further comprising:
etching the plurality of device structures to remove the dielectric layer from the top surface of each of the plurality of device structures;
depositing a second fill material over the fill material; and
planarizing the second fill material and the plurality of device structures to remove the seed layer from the top surface of each of the plurality of device structures.

14. The method of claim 10 , further comprising:
etching the plurality of device structures to remove the dielectric layer and the seed layer from the top surface of each of the plurality of device structures; and
forming a second fill material over the fill material.

15. A method, comprising:
providing a semiconductor device including a plurality of device structures each including a first sidewall opposite a second sidewall;
providing a seed layer over the first and second sidewall; and
forming a dielectric layer atop the seed layer, wherein the dielectric layer is formed along just a top surface of each of the plurality of device structures and along an upper portion of the first and second sidewalls using an angled deposition delivered to the plurality of device structures at a non-zero angle of inclination relative to a perpendicular extending from the semiconductor device.

16. The method of claim 15 , further comprising depositing a fill material over a portion of the seed layer extending between adjacent device structures of the plurality of device structures.

17. The method of claim 16 , wherein the fill material is inhibited from forming along the dielectric layer, and wherein the fill material is formed along just a lower portion of the first and second sidewalls.

18. The method of claim 16 , further comprising:
etching the semiconductor device to remove the dielectric layer from the top surface of each of the plurality of device structures;
depositing a second fill material over the fill material; and
planarizing the second fill material and the plurality of device structures to remove the seed layer from the top surface of each of the plurality of device structures.

19. The method of claim 16 , further comprising:
etching the plurality of device structures to remove the dielectric layer and the seed layer from the top surface of each of the plurality of device structures; and
forming a second fill material over the fill material.

Assignees

• Applied Materials Inc

Inventors

• Zeeshan M Arif
• Ma Tristan Y
• Chan Kelvin

Classifications

• H10P14/432

  using selective deposition · CPC title

• A63F9/02

  Shooting or hurling games · CPC title

• F41J1/00

  Targets; Target stands; Target holders (F41J2/00 - F41J11/00 take precedence; targets combined with bullet catchers F41J13/02) · CPC title

• F41B3/02 Primary

  Catapults, e.g. slingshots · CPC title

• H01L21/28562

  Electricity · mapped topic