Substrate polishing apparatus, substrate polishing method using the same, and semiconductor fabrication method including the same

Patent metadata

Field	Value
Publication number	US-12415248-B2
Application number	US-202217696277-A
Country	US
Kind code	B2
Filing date	Mar 16, 2022
Priority date	Aug 12, 2021
Publication date	Sep 16, 2025
Grant date	Sep 16, 2025

Abstract

Disclosed is a substrate polishing method comprising placing a substrate into a substrate polishing apparatus, rotating each of the substrate and a polishing pad of the substrate polishing apparatus, allowing a bottom surface of the substrate to contact a top surface of the polishing pad, and determining whether the polishing pad would benefit from maintenance. The polishing pad includes a plurality of annular regions that are homocentric with a central point of the top surface of the polishing pad. The step of determining whether the polishing pad would benefit from maintenance includes ascertaining a state of the bottom surface of the substrate, and selecting one of the plurality of annular regions by using information about the state of the bottom surface of the substrate. The one of the plurality of annular regions would benefit from maintenance.

First claim

What is claimed is:

1. A substrate polishing method, comprising:
placing a substrate into a substrate polishing apparatus;
rotating each of the substrate and a polishing pad of the substrate polishing apparatus;
allowing a bottom surface of the substrate to contact a top surface of the polishing pad; and
determining whether the polishing pad would benefit from undergoing maintenance,
wherein the polishing pad includes a plurality of annular regions that are homocentric with a central point of the top surface of the polishing pad,
wherein determining whether the polishing pad would benefit from undergoing maintenance includes,
ascertaining a state of the bottom surface of the substrate, and
selecting one of the plurality of annular regions by using information about the state of the bottom surface of the substrate, the one of the plurality of annular regions being in a state that would benefit from undergoing maintenance,
wherein the substrate polishing apparatus includes
a polishing head supporting the substrate,
a stage opposite the polishing head, and
the stage supporting the polishing pad.

2. The substrate polishing method of claim 1 ,
wherein ascertaining the state of the bottom surface of the substrate includes detecting a target area on the bottom surface of the substrate, the target area being in a state indicative of benefiting from an improvement in polishing state, and
wherein selecting the one of the plurality of annular regions that would benefit from undergoing maintenance includes selecting a plurality of contact annular regions from the plurality of annular regions, the plurality of contact annular regions being in contact with the target area when the bottom surface of the substrate that rotates is in contact with the top surface of the polishing pad.

3. The substrate polishing method of claim 2 ,
wherein allowing the bottom surface of the substrate to contact the top surface of the polishing pad includes allowing that, in a polishing location, the bottom surface of the substrate is polished while being in contact with the top surface of the polishing pad, and
wherein selecting the one of the plurality of annular regions that would benefit from undergoing maintenance further includes selecting a target annular region from the contact annular regions, the target annular region being most remote from a central point of the polishing location.

4. The substrate polishing method of claim 3 , further comprising:
maintaining the polishing pad,
wherein maintaining the polishing pad includes changing a condition of the target annular region.

5. The substrate polishing method of claim 4 , wherein changing the condition of the target annular region includes changing at least one selected from a modulus of elasticity, a hardness, a roughness, a density, a porosity, and a groove shape of the target annular region.

6. The substrate polishing method of claim 3 , further comprising:
maintaining the polishing pad, wherein maintaining the polishing pad includes replacing the target annular region.

7. The substrate polishing method of claim 1 , wherein at least two of the plurality of annular regions have different physical properties, and
the physical properties include at least one selected from a modulus of elasticity, a hardness, a roughness, a density, a porosity, and a groove shape.

8. The substrate polishing method of claim 1 , wherein the plurality of annular regions are configured to be separable from each other.

9. The substrate polishing method of claim 8 , further comprising:
replacing a partial area of the polishing pad based the selecting one of the plurality of annular regions being in a state that would benefit from undergoing maintenance.

10. The substrate polishing method of claim 1 , wherein a diameter of the polishing pad is larger than a diameter of the substrate.

11. A semiconductor fabrication method, comprising:
preparing a substrate;
placing the substrate into a substrate polishing apparatus;
rotating each of the substrate and a polishing pad of the substrate polishing apparatus; and
allowing a bottom surface of the substrate to contact a top surface of the polishing pad,
wherein the allowing the bottom surface of the substrate to contact the top surface of the polishing pad includes allowing that, in a polishing location, the bottom surface of the substrate is polished while being in contact with the top surface of the polishing pad,
wherein the polishing pad includes,
a disk-shaped central region that includes a central point of the top surface of the polishing pad, and
a plurality of annular regions that surround the central region and are homocentric with the central point,
wherein, among the plurality of annular regions that overlap a portion of the polishing location when viewed in plan, a width in a radius direction of an outer overlapping section where an outer annular region overlaps the polishing location is less than a width in a radius direction of each of other annular regions that overlap the polishing location, the outer annular region being an outermost one of the plurality of annular regions that overlap a portion of the polishing location,
wherein the substrate polis apparatus includes
polishing head supporting the substrate,
a stage opposite the polishing head, and

the stage supporting the polishing pad.

12. The semiconductor fabrication method of claim 11 , wherein the width in the radius direction of the outer overlapping section is in a range of about 1 mm to about 10 mm.

13. The semiconductor fabrication method of claim 11 , wherein a number of the annular regions is eight.

14. The semiconductor fabrication method of claim 11 , wherein, when viewed in plan, the polishing location does not overlap the central point.

15. The semiconductor fabrication method of claim 11 , wherein at least two of the annular regions have different physical properties, and
the physical properties include at least one selected from a modulus of elasticity, a hardness, a roughness, a density, a porosity, and a groove shape.

16. The semiconductor fabrication method of claim 11 , further comprising:
determining whether the polishing pad would benefit from undergoing maintenance,
wherein determining whether the polishing pad would benefit from undergoing maintenance includes,
ascertaining a state of the bottom surface of the substrate, and
selecting one of the annular regions by using information about the state of the bottom surface of the substrate, the one of the annular regions benefiting from undergoing maintenance.

17. The semiconductor fabrication method of claim 16 ,
wherein ascertaining the state of the bottom surface of the substrate includes detecting a target area on the bottom surface of the substrate, the target area benefiting from undergoing an improvement in polishing state, and
wherein selecting the one of the plurality of annular regions that would benefit from undergoing maintenance includes selecting a plurality of contact annular regions from the plurality of annular regions, the plurality of contact annular regions being in contact with the target area when the bottom surface of the substrate that rotates is in contact with the top surface of the polishing pad.

18. The semiconductor fabrication method of claim 17 , wherein selecting the one of the plurality of annular regions that would benefit from undergoing maintenance further includes selecting a target annular region from the contact annular regions, the target annular region being most remote fro

Assignees

• Samsung Electronics Co Ltd

Inventors

• Park Hyojin
• Kang Songyun
• Park Sung Yong
• Kim Keon-Woo

Classifications

• B24B37/30

  for single side lapping of plane surfaces · CPC title

• B24B37/042

  operating processes therefor · CPC title

• B24B53/017

  Devices or means for dressing, cleaning or otherwise conditioning lapping tools · CPC title

• B24B37/26

  characterised by the shape of the lapping pad surface, e.g. grooved · CPC title

• B24B49/183 Primary

  Wear compensation without the presence of dressing tools · CPC title