Optoelectronic semiconductor device

Patent metadata

Field	Value
Publication number	US-12413049-B2
Application number	US-202017629897-A
Country	US
Kind code	B2
Filing date	Jul 27, 2020
Priority date	Jul 26, 2019
Publication date	Sep 9, 2025
Grant date	Sep 9, 2025

Abstract

A semiconductor device for use in an optoelectronic integrated circuit; the device comprising: a group four substrate, a waveguide, and a group III/V multilayer stack; wherein the group III/V multilayer stack comprises a quantum component for producing light for the waveguide; wherein the waveguide comprises a material with a deposition temperature below 550 degrees Celsius and a refractive index of any value between 1.3 and 3.8.

First claim

The invention claimed is:

1. A semiconductor device for use in an optoelectronic integrated circuit;
the device comprising:
a group IV substrate, wherein the substrate is a silicon substrate, a SOI substrate, or a SOI top layer;
a waveguide;
a group III/V multilayer stack; and
a nucleation layer located between the group III/V multilayer stack and the substrate, wherein the nucleation layer has a zincblende structure;

wherein the group III/V multilayer stack comprises a quantum component for producing light for the waveguide;
wherein the waveguide comprises a material with a deposition temperature below 550 degrees Celsius and a refractive index of any value between 1.3 and 3.8.

2. The semiconductor device of claim 1 , wherein the quantum component comprises at least one quantum dot, quantum dash, or quantum wire.

3. The semiconductor device of claim 1 , wherein the waveguide comprises one or more of; silicon oxynitride (SiON), nitride-rich silicon nitride, stoichiometric silicon nitride, silicon-rich silicon nitride, amorphous silicon, glass (AL2O3), polymers, and/or conductive oxides.

4. The semiconductor device of claim 1 , wherein the waveguide has a stepped or graded index.

5. The semiconductor device of claim 1 , wherein the device further comprises:
a first insulating layer on the substrate,
a silicon device layer on the first insulating layer,
a second insulating layer on the silicon device layer, and
the waveguide on the second insulating layer.

6. The semiconductor device of claim 5 , wherein the first and second insulating layers comprise silicon oxide.

7. The semiconductor device of claim 5 , wherein the quantum component is optically coupled to the waveguide by a coupling structure between the waveguide and the silicon device layer.

8. The semiconductor device of claim 7 , wherein the coupling structure is a tapered connection between the waveguide and the silicon device layer.

9. The semiconductor device of claim 7 , wherein the coupling structure comprises one or more layers of silicon nitride inserted between the waveguide and the silicon device layer.

10. The semiconductor device of claim 5 , wherein the silicon device layer is a silicon waveguide.

11. The semiconductor device of claim 1 , wherein the device further comprises at least one anti-reflection coating located between the waveguide and the quantum component.

12. The semiconductor device of claim 11 , wherein the at least one anti-reflection coating has a refractive index between the values of 1.44 to 3.2.

13. A method of manufacturing a semiconductor device for use in an optoelectronic integrated circuit comprising:
providing a device comprising:
a group IV substrate, wherein the substrate is a silicon substrate, a SOI substrate, or a SOI top layer;
a group III/V multilayer stack; and
a nucleation layer located between the group III/V multilayer stack and the substrate, wherein the nucleation layer has a zincblende structure;
wherein the group III/V multilayer stack comprises a quantum component for producing light for the waveguide; and

depositing a waveguide using a deposition temperature below 550 degrees Celsius;
wherein the waveguide has a refractive index of any value between 1.3 and 3.8;
wherein the group III/V multilayer stack is optically coupled to the deposited waveguide.

14. The method according to claim 13 , wherein the waveguide is deposited or formed of one or more of the following materials; silicon oxynitride (SiON), nitride-rich silicon nitride, stoichiometric silicon nitride, silicon-rich silicon nitride, amorphous silicon, glass (AL2O3), polymer, and/or conductive oxides.

15. The method of claim 14 , wherein the group III/V multilayer stack is formed on the nucleation layer located between the group III/V multilayer stack and the silicon substrate.

16. The method according to claim 15 , wherein the group III/V multilayer stack is either deposited directly onto the nucleation layer, or is epitaxially grown from the nucleation layer to form a protruding slab.

17. The method according to claim 16 , wherein the material used to form the waveguide is deposited on either side of the protruding slab, wherein the waveguide is formed on either side of at least the quantum component.

Assignees

• Univ Southampton
• Univ London

Inventors

• Gardes Frederic
• Seeds Alwyn John
• Liu Huiyun
• Chen Siming

Classifications

• H01S5/341

  Structures having reduced dimensionality, e.g. quantum wires · CPC title

• H01S5/026

  Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers (stabilisation of output H01S5/06) · CPC title

• H01S5/021 Primary

  Silicon based substrates · CPC title

• G02B2006/12061

  Silicon · CPC title

• G02B6/131

  by using epitaxial growth (epitaxial growth for semiconductors H10P14/20) · CPC title