Measurement circuit having frequency domain estimation of device under test (DUT) model parameters

Patent metadata

Field	Value
Publication number	US-12411463-B2
Application number	US-202117532970-A
Country	US
Kind code	B2
Filing date	Nov 22, 2021
Priority date	Nov 25, 2020
Publication date	Sep 9, 2025
Grant date	Sep 9, 2025

Abstract

A circuit for determining device under test (DUT) model parameters is described. The circuit includes a parameter estimator circuit configured to: obtain initial values for DUT model parameters based on sense signal samples; execute a parameter convergence model having a regularization parameter and a cost function that accounts for error residuals; and obtain final values for the DUT model parameters by adjusting the regularization parameter in iterations of the parameter convergence model as a function of cost function improvement until the parameter convergence model converges to within a target tolerance.

First claim

What is claimed is:

1. A circuit comprising:
a driver circuit configured to provide a first signal to a battery;
sense circuitry configured to provide a second signal by sensing a response of the battery to the first signal; and
a parameter estimator circuit configured to:
determine a measured impedance of the battery under a measurement condition based on the second signal;
determine first values of multiple capacitance parameters, multiple resistance parameters, and mode time constants of an impedance model of the battery based on the measured impedance, in which the first values reflect the measurement condition of the battery, the capacitance parameters contribute to first real and imaginary components of the impedance model, and the resistance parameters contribute to second real and imaginary components of the impedance model, wherein the mode time constants correspond to at least one of: a degree of discharge of the battery, a temperature of the battery, or an age of the battery, and wherein the mode time constants are based on a starting condition parameter;
start an iterative process of determining values of the capacitance parameters and resistance parameters by providing the first values to a parameter convergence model as initial values; and
end the iterative process based on the parameter convergence model indicating that the values of the capacitance parameters and resistance parameters reaching a target tolerance, and provide the values at the end of the iterative process as final values of the capacitance parameters and resistance parameters.

2. The circuit of claim 1 , wherein the parameter convergence model represents a relationship between adjustments to the first values and a difference between the measured impedance and an estimated impedance based on the impedance model including the values of the capacitance parameters and resistance parameters, the relationship including regularization parameters, and wherein the parameter estimator circuit is configured to, in the iterative process:
provide a first iteration of the values to the parameter convergence model to determine a first iteration of estimated impedance;
determine a first iteration of the difference between the measured impedance and the first iteration of the estimated impedance;
determine a first iteration of the adjustments to the first values based on a first iteration of the regularization parameters and the first iteration of the difference;
determine a second iteration of the values based on adjusting the first iteration of the first values based on the first iteration of the adjustments;
determine a second iteration of the difference based on the second iteration of the values and the parameter convergence model; and
determine a second iteration of the regularization parameters based on a ratio between (i) a first metric based on the first and second iterations of the difference; and (ii) a second metric based on the first iteration of the regularization parameters and the first iteration of the adjustments.

3. The circuit of claim 2 , wherein the parameter estimator circuit is configured to, in the iterative process:
compare the ratio to a threshold; and
responsive to the ratio being greater than the threshold, determine the second iteration of the regularization parameters by multiplying the first iteration of the regularization parameters by a maximum of a first parameter value and a second parameter value.

4. The circuit of claim 3 , wherein the first parameter value is a predetermined value and the second parameter value is based on the ratio.

5. The circuit of claim 2 , wherein the parameter estimator circuit is configured to, in the iterative process:
compare the ratio to a threshold; and
responsive to the ratio being less than or equal to the threshold, determine the second iteration of the regularization parameters by multiplying the first iteration of the regularization parameters by a pre-determined value.

6. The circuit of claim 2 , wherein the measured impedance is a measured impedance spectrum at multiple frequencies, the estimated impedance is an estimated impedance spectrum at the multiple frequencies, and the difference is based on a sum of square of differences between the estimated and measured impedance spectrums.

7. The circuit of claim 1 , further comprising a frequency analyzer circuit configured to:
generate a frequency domain representation of the second signal; and
provide the frequency domain representation of the second signal to the parameter estimator circuit,
wherein the parameter estimator circuit is configured to determine a first impedance using the frequency domain representation of the second signal.

8. The circuit of claim 1 , wherein the multiple resistance and capacitance parameters include at least one of: a series resistance, a series capacitance, mode capacitances, or mode resistances.

9. The circuit of claim 1 , wherein the measurement condition includes at least one of: a degree of discharge (DOD), a temperature, or an age.

10. The circuit of claim 1 , wherein the parameter estimator circuit is configured to adjust regularization parameters of the parameter convergence model in the iterative process.

11. A system comprising:
a driver circuit configured to provide a first signal to a battery, in which the battery is under a measurement condition;
sense circuitry configured to provide a second signal by sensing a response of the battery to the first signal;
a memory that stores a set of instructions; and
a processor configured to execute the set of instructions to:
determine a measured impedance of the battery based on the second signal;
determine first values of multiple capacitance parameters, multiple resistance parameters, and mode time constants of an impedance model of the battery based on the measured impedance, in which the first values reflect the measurement condition, the capacitance parameters contribute to first real and imaginary components of the impedance model, and the resistance parameters contribute to second real and imaginary components of the impedance model, wherein the mode time constants correspond to at least one of: a degree of discharge of the battery, a temperature of the battery, or an age of the battery, and wherein the mode time constants are based on a starting condition parameter;
start an iterative process of determining values of the capacitance parameters and resistance parameters by providing the first values to a parameter convergence model as initial values; and
end the iterative process based on the parameter convergence model indicating that the values of the capacitance parameters and resistance parameters reaching a target tolerance, and provide the values at the end of the iterative process as final values of the capacitance parameters and resistance parameters.

12. The system of claim 11 , wherein the parameter convergence model represents a relationship between adjustments to the first values and a difference between the measured impedance and an estimated impedance based on the impedance model including the values of the capacitance parameters and resistance parameters, the relationship including regularization parameters, and wherein the processor is configured to, in the iterative process:
provide a first iteration of the values to the parameter convergence model to determine a first iteration of estimated impedance;
determine a first iteration of the difference between the measured impedance and the first iteration of the estimated impedance;
determine a first iteration of the adjustments to the first values based on a first iteration of the regularization param

Assignees

• Texas Instruments Inc

Inventors

• Sestok Iv Charles Kasimer
• Magee David Patrick
• Barsukov Yevgen Pavlovich

Classifications

• G05B13/04

  involving the use of models or simulators · CPC title

• G06F17/18

  for evaluating statistical data {, e.g. average values, frequency distributions, probability functions, regression analysis (forecasting specially adapted for a specific administrative, business or logistic context G06Q10/04)} · CPC title

• G06F17/14

  Fourier, Walsh or analogous domain transformations {, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms (for correlation function computation G06F17/156; spectrum analysers G01R23/16)} · CPC title

• G06F17/16

  Matrix or vector computation {, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization (matrix transposition G06F7/78)} · CPC title

• G06F17/13

  Differential equations (using digital differential analysers G06F7/64) · CPC title