Microdevice cartridge structure

Patent metadata

Field	Value
Publication number	US-12408480-B2
Application number	US-202017432432-A
Country	US
Kind code	B2
Filing date	Feb 22, 2020
Priority date	Feb 22, 2019
Publication date	Sep 2, 2025
Grant date	Sep 2, 2025

Abstract

What is disclosed structures and methods of integrating micro devices into system substrate.

First claim

The invention claimed is:

1. A method of releasing microdevices from an integrated array of microdevices on a substrate the method comprising:
forming the buffer layer on the substrate extendable over a surface of the substrate;
depositing a planarization layer on top of the substrate such that the planarization layer can be cured, wherein a bonding layer is formed on the planarization layer or on a cartridge;
removing a buffer layer from the integrated array to release a microdevice from the array,
wherein the integrated array of microdevices on the substrate comprises planar active layers on the substrate, the planar active layers comprising a first bottom conductive layer, a functional layer and a second top conductive layer.

2. The method of claim 1 , wherein test pads on either a backplane or microdevices create a force to pull out microdevices.

3. The method of claim 2 , wherein the backplane is made with a thin film transistor (TFT) process.

4. The method of claim 1 , further comprising:
developing the microdevices by etching of the planar active layers with other layers deposited before or after forming the microdevices.

5. The method of claim 1 , wherein the buffer layer is conductive.

6. The method of claim 1 , wherein the buffer layer includes a patternable or common electrode.

7. The method of claim 1 , wherein the planarization layer comprises a polymer.

8. The method of claim 1 , wherein the bonding layer provides one or more different forces and, after it comes into contact with the planarization layer, it is cured.

9. The method of claim 1 , wherein, after an intermediate substrate is formed over the bonding layer, the substrate is removed by laser or chemical liftoff.

10. The method of claim 1 , wherein the microdevices connect to the planarization layer or protective layer via an opening in the buffer layer, and wherein the connection provides an anchor that holds the microdevices after the chemical liftoff.

Assignees

• Vuereal Inc

Inventors

• Chaji Gholamreza
• Fathi Ehsanollah
• Gavirneni Pranav
• Sadeghimakki Bahareh
• Alayashi Wissal Mahdi

Classifications

• H10P74/273

  Interconnections for measuring or testing, e.g. probe pads · CPC title

• H10W90/00

  Package configurations · CPC title

• H10P72/7448

  the bond interface between the auxiliary support and the wafer comprising two or more, e.g. multilayer adhesive or adhesive and release layer · CPC title

• H10P72/744

  Details of chemical or physical process used for separating the auxiliary support from a device or a wafer · CPC title

• H10P72/7434

  used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate · CPC title