Epitaxial-silicon-wafer manufacturing method and epitaxial silicon wafer
US-2017011918-A1 · Jan 12, 2017 · US
US12408367B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12408367-B2 |
| Application number | US-202318353875-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 17, 2023 |
| Priority date | Nov 30, 2015 |
| Publication date | Sep 2, 2025 |
| Grant date | Sep 2, 2025 |
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A device includes a fin structure, a gate structure, a first source/drain epitaxial structure and, a second source/drain epitaxial structure. The fin structure over a substrate and includes a bottom portion protruding from the substrate and a top portion over the bottom portion. An interface between the bottom portion and the top portion comprises oxygen and has an oxygen concentration lower than about 1.E+19 atoms/cm 3 . The gate structure covers the fin structure. The first source/drain epitaxial structure and the second source/drain epitaxial structure are over the top portion of the fin structure and on opposite sides of the gate structure.
Opening claim text (preview).
What is claimed is: 1. A device comprising: a fin structure over a substrate, wherein the fin structure comprises: a bottom portion protruding from the substrate; and a top portion over the bottom portion, wherein a composition of the bottom portion is different from a composition of the top portion, and an interface between the bottom portion and the top portion comprises oxygen and has an oxygen concentration lower than about 1.E+19 atoms/cm 3 ; a gate structure covering the fin structure; and a first source/drain epitaxial structure and a second source/drain epitaxial structure over the top portion of the fin structure and on opposite sides of the gate structure. 2. The device of claim 1 , wherein the bottom portion of the fin structure has an implantation region therein. 3. The device of claim 1 , further comprising an isolation structure over the substrate and adjacent to the fin structure. 4. The device of claim 3 , wherein a top surface of the isolation structure is higher than the interface between the bottom portion and the top portion. 5. The device of claim 3 , wherein a top surface of the isolation structure is higher than an interface between the top portion of the fin structure and the first source/drain epitaxial structure. 6. The device of claim 1 , wherein a part of the top portion of the fin structure directly beneath the first source/drain epitaxial structure has a vertical thickness less than a vertical thickness of the bottom portion of the fin structure. 7. The device of claim 1 , wherein the top portion of the fin structure is a silicon layer. 8. A device comprising: a semiconductive fin comprising: a bottom semiconductive portion; and a top semiconductive portion covering the bottom semiconductive portion, wherein an oxygen concentration of the top semiconductive portion is greater than an oxygen concentration of the bottom semiconductive portion; a first source/drain epitaxial structure and a second source/drain epitaxial structure over the top semiconductive portion; and a gate structure across the semiconductive fin and between the first source/drain epitaxial structure and the second source/drain epitaxial structure. 9. The device of claim 8 , wherein a gradient of the oxygen concentration of the top semiconductive portion of the semiconductive fin in a depth direction is higher than a gradient of the oxygen concentration of the bottom semiconductive portion of the semiconductive fin in the depth direction. 10. The device of claim 8 , wherein the oxygen concentration of the bottom semiconductive portion of the semiconductive fin is about 1.E+18 atoms/cm 3 . 11. The device of claim 8 , wherein the oxygen concentration of the top semiconductive portion of the semiconductive fin is lower than about 1.E+21 atoms/cm 3 . 12. The device of claim 8 , wherein the bottom semiconductive portion of the semiconductive fin has an implantation region therein. 13. The device of claim 8 , further comprising sidewall spacers on opposite sides of the first source/drain epitaxial structure. 14. The device of claim 13 , wherein the sidewall spacers are spaced apart from the top semiconductive portion of the semiconductive fin. 15. A device comprising: a substrate comprising a protruding portion; a gate structure over the substrate and covering the protruding portion; a first source/drain epitaxial structure and a second source/drain epitaxial structure over the protruding portion of the substrate and on opposite sides of the gate structure; and a semiconductive layer over the protruding portion of the substrate and extending from beneath the first source/drain epitaxial structure to beneath the second source/drain epitaxial structure, wherein an oxygen concentration of the semiconductive layer decreases in a depth direction of the semiconductive layer. 16. The device of claim 15 , wherein the oxygen concentration of the semiconductive layer decreases in the depth direction to about 1.E+18 atoms/cm 3 . 17. The device of claim 15 , wherein a bottom surface of the semiconductive layer has a lowest oxygen concentration in the semiconductive layer. 18. The device of claim 15 , wherein the protruding portion of the substrate comprises P-type or N-type dopants. 19. The device of claim 15 , wherein the semiconductive layer is in contact with the protruding portion. 20. The device of claim 15 , wherein the semiconductive layer is in contact with the first source/drain epitaxial structure.
Thermal treatments, e.g. annealing or sintering · CPC title
Cleaning during device manufacture · CPC title
into Group IV semiconductors · CPC title
of electrically active species · CPC title
for use before dicing · CPC title
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