Wafer having a silicon carbide crystal layer with stacking faults provided on a silicon carbide base body and semiconductor device manufactured using the wafer

US12406844B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12406844-B2
Application numberUS-202217812249-A
CountryUS
Kind codeB2
Filing dateJul 13, 2022
Priority dateOct 5, 2021
Publication dateSep 2, 2025
Grant dateSep 2, 2025

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

According to one embodiment, a wafer includes a base body including a first surface, and a crystal layer provided on the first surface. The crystal layer includes first stacking faults and one or second stacking faults. One of the first stacking faults includes a first long side, a first short side, and a first hypotenuse. A position of the first long side in a first direction from the base body to the crystal layer is between the base body in the first direction and a first corner portion in the first direction. One of the one or the plurality of second stacking faults includes a second long side, a second short side, and a second hypotenuse. A position of a second corner portion in the first direction is between the base body in the first direction and the second long side in the first direction.

First claim

Opening claim text (preview).

What is claimed is: 1. A wafer, comprising: a base body including a first surface, the base body including silicon carbide; and a crystal layer provided on the first surface, the crystal layer including silicon carbide, the crystal layer including a plurality of first stacking faults and one or a plurality of second stacking faults, one of the first stacking faults including a first long side, a first short side, and a first hypotenuse, a length of the first long side being longer than a length of the first short side, an angle between the first long side and the first short side being substantially a right angle, the first long side being located in the crystal layer and extending parallel to the first surface, a position of the first long side in a first direction from the base body to the crystal layer being between a position of the base body in the first direction and a position of a first corner portion in the first direction, the first corner portion being between the first short side and the first hypotenuse, and the first short side extending in a second direction crossing the first direction, one of the one or the plurality of second stacking faults including a second long side, a second short side, and a second hypotenuse, a length of the second long side being longer than a length of the second short side, an angle between the second long side and the second short side being substantially a right angle, the second long side extending parallel to the first surface, a position of a second corner portion in the first direction being between the position of the base body in the first direction and a position of the second long side in the first direction, the second corner portion being between the second short side and the second hypotenuse, and the second short side extending in a third direction crossing the first direction, and a first density of the first stacking faults in the crystal layer being higher than a second density of the one or the second stacking faults in the crystal layer. 2. The wafer according to claim 1 , wherein the first density is not less than 1.2 times the second density. 3. The wafer according to claim 1 , wherein the first density is not less than 2 times the second density. 4. The wafer according to claim 1 , wherein the first short side is shorter than the second short side. 5. The wafer according to claim 1 , wherein the base body includes a plurality of basal plane dislocations, the first short side is continuous with one of the basal plane dislocations, and the second short side is continuous with another one of the basal plane dislocations. 6. A wafer, comprising: a base body including a first surface, the base body including silicon carbide; and a crystal layer having a lower side provided on the first surface, the crystal layer including silicon carbide and an upper surface opposing the lower side, the crystal layer including one or a plurality of first stacking faults, one of the one or the plurality of first stacking faults including a first long side, a first short side, and a first hypotenuse, a length of the first long side being longer than a length of the first short side, an angle between the first long side and the first short side being substantially a right angle, the first long side located in the crystal layer separated from the upper surface and extending parallel to the first surface, a position of the first long side in a first direction from the base body to the crystal layer being between a position of the base body in the first direction and a position of a first corner portion in the first direction, the first corner portion being between the first short side and the first hypotenuse, and the first short side extending in a second direction crossing the first direction, the crystal layer not including a second stacking fault, the second stacking fault including a second long side, a second short side, and a second hypotenuse, a length of the second long side being longer than a length of the second short side, an angle between the second long side and the second short side being substantially a right angle, the second long side located in the crystal layer and extending parallel to the first surface, a position of a second corner portion in the first direction being between the position of the base body in the first direction and a position of the second long side in the first direction, the second corner portion being between the second short side and the second hypotenuse. 7. The wafer according to claim 6 , wherein the base body includes a basal plane dislocation, and the first short side is continuous with the basal plane dislocation. 8. The wafer according to claim 1 , wherein the crystal layer includes a first crystal region and a second crystal region, the first crystal region is between the base body and the second crystal region, the first crystal region is disposed directly on the second crystal region, a concentration of impurity in the second crystal region is higher than a concentration of the impurity in the first crystal region, and the position of the first corner portion in the first direction is between the position of the first long side in the first direction and a position of the second crystal region in the first direction. 9. The wafer according to claim 8 , wherein an angle θ between the first surface and a (0001) plane of the crystal layer is larger than 0 and not more than 10 degrees, the first crystal region has a first thickness t1 along the first direction, and a length of the first short side is smaller than t1/tan (θ). 10. The wafer according to claim 9 , wherein the first thickness t1 is not less than 5 μm and not more than 150 μm. 11. The wafer according to claim 8 , wherein a second thickness t2 of the second crystal region along the first direction is not less than 0.3 μm and not more than 3 μm. 12. The wafer according to claim 8 , wherein the impurity is of a p-type. 13. The wafer according to claim 8 , wherein the first crystal region includes at least one selected from the group consisting of N, P and As, and the second crystal region includes at least one selected from the group consisting of B, Al and Ga. 14. A semiconductor device, comprising: a part of a wafer, the part comprising: a base body including a first surface, the base body including silicon carbide; and a crystal layer provided on the first surface, the crystal layer including silicon carbide, the crystal layer including a plurality of first stacking faults and one or a plurality of second stacking faults, one of the first stacking faults including a first long side, a first short side, and a first hypotenuse, a length of the first long side being longer than a length of the first short side, an angle between the first long side and the first short side being substantially a right angle, the first long side being located in the crystal layer and extending parallel to the first surface, a position of the first long side in a first direction from the base body to the crystal layer being between a position of the base body in the first direction and a position of a first corner portion in the first direction, the first corner portion being between the first short side and the first hypotenuse, and the first short side extending in a second direction crossing the first direction, one of the one or the plurality of second stacking faults including a second long side, a second short side, and a second hypotenuse, a length of the second long side being longer than a length of the second short side, an angle between the se

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What does patent US12406844B2 cover?
According to one embodiment, a wafer includes a base body including a first surface, and a crystal layer provided on the first surface. The crystal layer includes first stacking faults and one or second stacking faults. One of the first stacking faults includes a first long side, a first short side, and a first hypotenuse. A position of the first long side in a first direction from the base bod…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10P14/2904. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 02 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).