Systems and methods for duty cycle compensation of a digital to analog converter (DAC)

Patent metadata

Field	Value
Publication number	US-12388452-B2
Application number	US-202217958691-A
Country	US
Kind code	B2
Filing date	Oct 3, 2022
Priority date	Nov 3, 2021
Publication date	Aug 12, 2025
Grant date	Aug 12, 2025

Abstract

A temperature stabilization technique for a digital-to-analog converter (DAC). The DAC is kept operating while a load, for example an analog computer, is disconnected from the DAC in order to reduce temperature changes that otherwise occur when the DAC is idle. The DAC may be supplied with adjusted input to compensate for changes in dissipation caused by the removal of the load.

First claim

The invention claimed is:

1. A computer system comprising:
a digital computer;
a digital-to-analog converter (DAC) communicatively coupled to the digital computer to receive digital input and having an analog signal output;
a principal load communicatively coupled to the analog signal output;
an auxiliary load communicatively coupled to the analog signal output; and
at least one switch communicatively coupled to the analog signal output, the principal load, and the auxiliary load, the at least one switch operable to connect and disconnect the principal load from the analog signal output, the auxiliary load arranged to receive an analog signal from the analog signal output when the principal load is disconnected from the analog signal output of the DAC;
wherein in use the digital computer supplies digital input to the DAC both when the principal load is connected to the analog signal output of the DAC and when the principal load is disconnected from the analog signal output of the DAC, and
wherein, when the principal load is disconnected from the analog signal output, the digital computer causes an adjustment of the digital input to the DAC to adjust an amplitude of the analog signal from the analog signal output of the DAC to compensate for a change in dissipation from analog components of the DAC resulting from the disconnection of the principal load from the analog signal output.

2. The computer system of claim 1 wherein the auxiliary load is arranged electrically in parallel with the principal load to receive the analog signal from the analog signal output while the principal load is connected to the analog signal output of the DAC.

3. The computer system of claim 1 wherein the analog signal from the analog signal output is an output current.

4. The computer system of claim 1 wherein the principal load and the auxiliary load together receive the analog signal from the analog signal output when the principal load is connected to the analog signal output.

5. The computer system of claim 1 wherein the auxiliary load comprises a shunt resistor.

6. The computer system of claim 5 wherein the shunt resistor is a termination resistor.

7. The computer system of claim 6 wherein the termination resistor is located on a transmission line from the DAC to the principal load.

8. The computer system of claim 5 wherein the analog signal from the analog signal output is a differential signal output comprising a pair of opposite analog signal outputs, and the shunt resistor connects between opposite analog signal outputs of the pair.

9. The computer system of claim 1 wherein the digital computer supplies the digital input to the DAC to cause the DAC to produce as the analog signal from the analog signal output a first waveform of a characteristic shape when the analog signal output is connected to the principal load, and when the analog signal output is not connected to the principal load, the digital computer supplies the digital input to the DAC to cause the DAC to produce as the analog signal output a second waveform of the characteristic shape.

10. The computer system of claim 1 wherein the principal load comprises a portion of a quantum computer system.

11. The computer system of claim 10 wherein the portion of the quantum computer system comprises a portion of an arrangement of on chip control circuitry on a processor chip of a quantum computer, the arrangement of on chip control circuitry communicatively coupled to supply analog inputs to the quantum computer.

12. The computer system of claim 1 wherein the digital computer causes an adjustment of the digital input to the DAC to adjust the amplitude of the analog signal from the analog signal output of the DAC by a factor equal to a ratio between a first overall resistance faced by the DAC when the principal load is connected to the DAC to a second overall resistance faced by the DAC when the principal load is not connected to the DAC.

13. The computer system of claim 1 wherein the digital computer supplies the digital input to the DAC to cause the DAC to produce as the analog signal from the analog signal output a first waveform of a characteristic shape when the analog signal output is connected to the principal load, and when the analog signal output is not connected to the principal load, the digital computer supplies the digital input to the DAC to cause the DAC to produce as the analog signal of the analog signal output a second waveform of the characteristic shape.

14. A method of operation in a system that includes a digital-to-analog converter (DAC), a digital computer and an analog computer, the digital computer communicatively coupled to the DAC to provide digital input to the DAC, and the DAC selectively communicatively coupled to the analog computer to provide analog output from the DAC to the analog computer, the method comprising:
operating the DAC, by the digital computer, to produce a first analog output from the DAC while the analog computer is connected to the DAC;
disconnecting the analog computer from the DAC by at least one switch such that an auxiliary resistance is connected to the DAC; and
operating the DAC, by the digital computer, to provide a second analog output from the DAC while the analog computer is disconnected from the DAC; and
adjusting the digital input to the DAC by the digital computer to adjust an amplitude of the analog output of the DAC to at least partially compensate for a change in dissipation from analog components of the DAC resulting from the disconnection of the DAC from the analog output.

15. The method of claim 14 further comprising: determining an adjustment digital input to the DAC to at least partially compensate for a change in dissipation from analog components of the DAC resulting from the disconnection of the DAC from the analog output, and adjusting the digital input to the DAC based at least in part of the determination.

16. The method of claim 14 further comprising: connecting an auxiliary resistance to the analog output of the DAC to at least partially compensate for change in dissipation from analog components of the DAC resulting from the disconnection of the DAC from the analog output.

17. The method of claim 14 wherein connecting the analog computer to the DAC comprises connecting the analog computer to the DAC electrically in parallel with an auxiliary resistance that is electrically coupled to the analog output of the DAC.

18. The method of claim 17 further comprising: determining an adjustment digital input to the DAC to at least partially compensate for a change in dissipation from an auxiliary resistance that is electrically coupled to the analog output of the DAC, and adjusting the digital input to the DAC based at least in part of the determination.

Assignees

• D Wave Systems Inc
• 1372934 B C Ltd

Inventors

• Pavlov Igor

Classifications

• G06N10/60

  Quantum algorithms, e.g. based on quantum optimisation, quantum Fourier or Hadamard transforms · CPC title

• H03M1/66

  Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

• H03M1/089 Primary

  of temperature variations · CPC title

• H03M1/0604 Primary

  at one point, i.e. by adjusting a single reference value, e.g. bias or gain error (gain setting for range control H03M1/18) · CPC title