Semiconductor device including insulating layers and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-12382687-B2
Application number	US-202318169327-A
Country	US
Kind code	B2
Filing date	Feb 15, 2023
Priority date	Sep 5, 2018
Publication date	Aug 5, 2025
Grant date	Aug 5, 2025

Abstract

A semiconductor device includes a trench defining an active region in a substrate, a first insulating layer on a bottom surface and side surfaces of the active region inside the trench, a shielding layer on a surface of the first insulating layer, the shielding layer including a plurality of spaced apart particles, a second insulating layer on the shielding layer and having first charge trapped therein, the plurality of spaced apart particles being configured to concentrate second charge having an opposite polarity to the charge trapped in the second insulating layer, and a gap-fill insulating layer on the second insulating layer in the trench.

First claim

What is claimed is:

1. A semiconductor device comprising:
a trench defining an active region in a substrate;
a first insulating layer on a bottom surface and side surfaces of the active region inside the trench;
a shielding layer arranged on a surface of the first insulating layer and exposing a portion of the surface of the first insulating layer;
a second insulating layer arranged on the shielding layer and contacting the exposed portion of the surface of the first insulating layer along the bottom surface and the side surfaces of the active region inside the trench; and
a gap-fill insulating layer on the second insulating layer and being separated from the first insulating layer by the second insulating layer, such that the gap-fill insulating layer does not directly contact the first insulating layer,
wherein the first insulating layer includes at least one protrusion that protrudes over the surface of the first insulating layer and that contacts the second insulating layer.

2. The semiconductor device of claim 1 , wherein the at least one protrusion of the first insulating layer is arranged on an inner side surface of the first insulating layer and protrudes toward the gap-fill insulating layer.

3. The semiconductor device of claim 1 , wherein the at least one protrusion of the first insulating layer is arranged at a position having a depth of about 100 Å or less from a top surface of the substrate.

4. The semiconductor device of claim 1 , wherein the shielding layer includes a plurality of particles that are spaced apart from each other.

5. The semiconductor device of claim 4 , wherein the plurality of particles of the shielding layer are arranged on an inner side surface of the first insulating layer.

6. The semiconductor device of claim 4 , wherein the at least one protrusion of the first insulating layer is arranged above the plurality of particles of the shielding layer.

7. The semiconductor device of claim 4 , wherein one of the plurality of particles of the shielding layer is in contact with the at least one protrusion of the first insulating layer.

8. The semiconductor device of claim 4 , wherein the at least one protrusion of the first insulating layer includes a first protrusion and a second protrusion below the first protrusion,
wherein the plurality of particles of the shielding layer includes a first particle and a second particle above the first particle, and
wherein the second protrusion of the at least one protrusion of the first insulating layer is in contact with the second particle of the plurality of particles of the shielding layer.

9. The semiconductor device of claim 8 , wherein the second protrusion of the at least one protrusion of the first insulating layer is smaller than the first protrusion of the at least one protrusion of the first insulating layer, and
wherein the second particle of the plurality of particles of the shielding layer is smaller than the first particle of the plurality of particles of the shielding layer.

10. The semiconductor device of claim 8 , wherein the second protrusion of the at least one protrusion of the first insulating layer is disposed above the second particle of the plurality of particles of the shielding layer.

11. The semiconductor device of claim 4 , wherein one of the plurality of particles of the shielding layer is in contact with the at least one protrusion of the first insulating layer and is arranged between the at least one protrusion of the first insulating layer and the second insulating layer.

12. A semiconductor device comprising:
a trench defining an active region in a substrate;
a first insulating layer on a bottom surface and side surfaces of the active region inside the trench;
a shielding layer on the first insulating layer;
a second insulating layer arranged on the shielding layer and covering the bottom surface and the side surfaces of the active region inside the trench; and
a gap-fill insulating layer on the second insulating layer,
wherein the second insulating layer includes at least one recess region on at least one of outer side surfaces and an outer bottom surface of the second insulating layer, and
wherein the shielding layer is in contact with a first portion of one of the at least one recess region of the second insulating layer while a second portion of the one of the at least one recess region of the second insulating layer is free of the shielding layer.

13. The semiconductor device of claim 12 , wherein the first insulating layer includes at least one protrusion on at least one of inner side surfaces of the first insulating layer, and
wherein the at least one protrusion of the first insulating layer is in contact with the at least one recess region of the second insulating layer.

14. The semiconductor device of claim 12 , wherein the shielding layer includes a plurality of particles that are spaced apart from each other, and
wherein one of the plurality of particles of the shielding layer is in contact with the at least one recess region of the second insulating layer.

15. The semiconductor device of claim 12 , wherein the shielding layer includes a liner layer on the at least one of the outer side surfaces and the outer bottom surface of the second insulating layer, and
wherein the liner layer of the shielding layer is in contact with the at least one recess region of the second insulating layer.

16. The semiconductor device of claim 12 , wherein the second insulating layer is in partial contact with inner side surfaces and an inner bottom surface of the first insulating layer.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Dong Kak
• Kim Min Woo
• Kim Bong Hyun
• Park Hee Young
• Ahn Seo Jin
• Lee Won Yong

Classifications

• H10W10/17

  formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H10W10/014

  using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H10W42/20

  protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons · CPC title

• H10W10/0143 Primary

  comprising concurrently refilling multiple trenches having different shapes or dimensions · CPC title

• H10W10/0148 Primary

  comprising introducing impurities in side walls or bottom walls of trenches, e.g. for forming channel stoppers · CPC title