Systems and methods for identifying and remediating architecture risk

Patent metadata

Field	Value
Publication number	US-12373623-B2
Application number	US-202217653781-A
Country	US
Kind code	B2
Filing date	Mar 7, 2022
Priority date	Mar 7, 2022
Publication date	Jul 29, 2025
Grant date	Jul 29, 2025

Abstract

Systems and methods for identifying and remediating architecture risk are disclosed. In one aspect, a method includes generating a first chaos graph pattern and a second chaos graph pattern; training a machine learning model to recognize the first chaos graph pattern and the second chaos graph pattern; identifying an architecture graph pattern of an evaluated architecture; including the architecture graph pattern in an architecture testing graph; recognizing by the machine learning model that a shape of the architecture graph pattern is similar to a shape of the first chaos graph pattern and that the shape of the architecture graph pattern is similar to a shape of the second chaos graph pattern; and predicting a remedial reconfiguration, wherein the remedial reconfiguration includes a reconfiguration of a design of the evaluated architecture.

First claim

The invention claimed is:

1. A method of identifying and remediating architecture risk, comprising:
generating a first chaos graph pattern and a second chaos graph pattern;
training a machine learning model to recognize the first chaos graph pattern and the second chaos graph pattern;
identifying an architecture graph pattern of an evaluated architecture;
including the architecture graph pattern in an architecture testing graph;
processing, by a machine learning engine including the machine learning model, the architecture testing graph, including the architecture graph pattern of the evaluated architecture;
recognizing, as a result of the processing and by the machine learning engine, that a shape of the architecture graph pattern is similar to a shape of the first chaos graph pattern and that the shape of the architecture graph pattern is similar to a shape of the second chaos graph pattern; and
predicting, by the machine learning engine and based on the recognizing, a remedial reconfiguration, wherein the remedial reconfiguration includes a reconfiguration of a design of the evaluated architecture.

2. The method of claim 1 , wherein the first chaos graph pattern is a graph representation of a first operational system operating in a simulated chaos environment.

3. The method of claim 2 , wherein the second chaos graph pattern is a graph representation of a second operational system operating in a simulated chaos environment.

4. The method of claim 2 , wherein the first chaos graph pattern is labeled as problematic as a result of the first operational system exhibiting a relatively high level of disruption in the simulated chaos environment.

5. The method of claim 3 , wherein the second chaos graph pattern is labeled as robust as a result of the second operational system exhibiting a relatively low level of disruption in the simulated chaos environment, or no level of disruption in the simulated chaos environment.

6. The method of claim 1 , wherein remedial reconfiguration shifts the shape of the architecture graph pattern to be less similar to the shape of the first chaos graph pattern, and more similar to the shape of the second chaos graph pattern.

7. The method of claim 1 , wherein the remedial reconfiguration is presented to a testing user of the testing architecture graph.

8. The method of claim 1 , wherein the remedial reconfiguration is automatically applied to the design of the evaluated architecture.

9. The method of claim 8 , wherein the remedial reconfiguration is a reconfiguration of a standard architecture design document of the evaluated architecture.

10. The method of claim 1 , wherein the architecture graph pattern is an intended state dimension of the evaluated architecture from an architecture knowledge graph.

11. A system for identifying and remediating architecture risk comprising at least one server including a processor and a memory, wherein the at least one server is configured for operative communication on a technology infrastructure of an evaluating organization, and wherein instructions stored on the memory instruct the processor to:
generate a first chaos graph pattern and a second chaos graph pattern;
train a machine learning model to recognize the first chaos graph pattern and the second chaos graph pattern;
identify an architecture graph pattern of an evaluated architecture;
include the architecture graph pattern in an architecture testing graph;
process, by a machine learning engine including the machine learning model, the architecture testing graph, including the architecture graph pattern of the evaluated architecture;
recognize, as a result of the processing and by the machine learning engine, that a shape of the architecture graph pattern is similar to a shape of the first chaos graph pattern and that the shape of the architecture graph pattern is similar to a shape of the second chaos graph pattern; and
predict, by the machine learning engine and based on the recognizing, a remedial reconfiguration, wherein the remedial reconfiguration includes a reconfiguration of a design of the evaluated architecture.

12. The system of claim 11 , wherein the first chaos graph pattern is a graph representation of a first operational system operating in a simulated chaos environment.

13. The system of claim 12 , wherein the second chaos graph pattern is a graph representation of a second operational system operating in a simulated chaos environment.

14. The system of claim 12 , wherein the first chaos graph pattern is labeled as problematic as a result of the first operational system exhibiting a relatively high level of disruption in the simulated chaos environment.

15. The system of claim 13 , wherein the second chaos graph pattern is labeled as robust as a result of the second operational system exhibiting a relatively low level of disruption in the simulated chaos environment, or no level of disruption in the simulated chaos environment.

16. The system of claim 11 , wherein remedial reconfiguration shifts the shape of the architecture graph pattern to be less similar to the shape of the first chaos graph pattern, and more similar to the shape of the second chaos graph pattern.

17. The system of claim 11 , wherein the remedial reconfiguration is presented to a testing user of the testing architecture graph.

18. The system of claim 11 , wherein the remedial reconfiguration is automatically applied to the design of the evaluated architecture.

19. The system of claim 18 , wherein the remedial reconfiguration is a reconfiguration of a standard architecture design document of the evaluated architecture.

20. A non-transitory computer readable storage medium, including instructions stored thereon for predicting and remediating technology architecture risk based on machine learning applied to a graph, which when read and executed by one or more computers cause the one or more computers to perform steps comprising:
generating a first chaos graph pattern and a second chaos graph pattern;
training a machine learning model to recognize the first chaos graph pattern and the second chaos graph pattern;
identifying an architecture graph pattern of an evaluated architecture;
including the architecture graph pattern in an architecture testing graph;
processing, by a machine learning engine including the machine learning model, the architecture testing graph, including the architecture graph pattern of the evaluated architecture;
recognizing, as a result of the processing and by the machine learning engine, that a shape of the architecture graph pattern is similar to a shape of the first chaos graph pattern and that the shape of the architecture graph pattern is similar to a shape of the second chaos graph pattern; and
predicting, by the machine learning engine and based on the recognizing, a remedial reconfiguration, wherein the remedial reconfiguration includes a reconfiguration of a design of the evaluated architecture.

Assignees

• Jpmorgan Chase Bank Na

Inventors

• Eavy Ryan
• Ibikunle Tayo

Classifications

• G06F18/214

  Generating training patterns; Bootstrap methods, e.g. bagging or boosting · CPC title

• G06F30/398 Primary

  Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) · CPC title

• G06N20/00

  Machine learning · CPC title

• G06F30/337

  Design optimisation · CPC title

• G06N3/02

  Neural networks · CPC title