Display apparatus using semiconductor light-emitting device, and manufacturing method therefor

US12364065B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12364065-B2
Application numberUS-202118691668-A
CountryUS
Kind codeB2
Filing dateSep 14, 2021
Priority dateSep 14, 2021
Publication dateJul 15, 2025
Grant dateJul 15, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention is applicable to display device-related technical fields and, for example, relates to a display device using micro LED (Light Emitting Diode) and a method of manufacturing the same. The present invention includes a substrate including a pixel area and a pad area located around the pixel area; a barrier layer located on the substrate and defining a plurality of unit pixel areas within the pixel area; a stress separation line located between the unit pixel areas on the barrier layer; a first electrode located in the unit pixel area; a semiconductor light emitting device in which a first type electrode is electrically connected to the first electrode within the unit pixel area; a coating layer formed on the semiconductor light emitting device and the barrier layer; and a second electrode electrically connected to the type second electrode of the semiconductor light emitting device on the coating layer.

First claim

Opening claim text (preview).

The invention claimed is: 1. A display device using a semiconductor light emitting device comprising: a substrate comprising a pixel area and a pad area located around the pixel area; a barrier layer positioned on the substrate and configured to define a plurality of unit pixel areas within the pixel area; a stress separation line located between the unit pixel areas on the barrier layer; a first electrode located in the unit pixel area; a semiconductor light emitting device in which a first type electrode is electrically connected to the first electrode within the unit pixel area; a coating layer formed on the semiconductor light emitting device and the barrier layer, and a second electrode electrically connected to a second type electrode of the semiconductor light emitting device on the coating layer, wherein the stress separation line comprises a compensation line having an inclination with respect to a short side direction of the substrate in the pad area, wherein the inclination of the compensation line is set so that the compensation line intersects a radial direction from a center of the substrate, wherein the stress separation line comprises a plurality of parallel stress separation lines in a top view of the substrate, wherein a width of a portion of the stress separation line is greater than a width of the semiconductor light emitting device, and wherein the plurality of parallel stress separation lines and the compensation line are arranged symmetrically with respect to a line crossing the center of the substrate in the top view of the substrate. 2. The display device using the semiconductor light emitting device according to claim 1 , wherein the substrate has a rectangular shape defined by a long side and, a short side, wherein the stress separation line is arranged in a direction parallel to the short side direction. 3. The display device using the semiconductor light emitting device according to claim 2 , wherein the stress separation line is continuously arranged with respect to the short side direction. 4. The display device using the semiconductor light emitting device according to claim 1 , wherein the plurality of stress separation lines are arranged at regular intervals with respect to a line crossing the center of the substrate. 5. The display device using the semiconductor light emitting device according to claim 1 , wherein the pad area comprises a first area where a connection wire connecting the pixel area and the driving chip is located, and a second area outside the driving chip. 6. The display device using the semiconductor light emitting device according to claim 1 , wherein the stress separation line is connected to the compensation line and comprises an extension line disposed in a direction parallel to the short side direction. 7. The display device using the semiconductor light emitting device according to claim 1 , wherein the stress separation line is configured to separate the transmission of at least one of stress caused by a difference in thermal expansion coefficient between the barrier layer and the substrate and stress generated during thermal curing of the barrier layer. 8. The display device using the semiconductor light emitting device according to claim 6 , wherein the extension line of the stress separation line parallel to the short side direction is not vertically overlapped with the first electrode and the second electrode on the substrate. 9. A display device using a semiconductor light emitting device comprising: a substrate having a rectangular shape defined by a long side direction and a short side direction and comprising a pixel area and a pad area located around the pixel area; a barrier layer positioned on the substrate and configured to define a plurality of unit pixel areas within the pixel area; a stress separation line located between the unit pixel areas on the barrier layer; and a semiconductor light emitting device installed in the unit pixel area, wherein the stress separation line is configured to have different slopes in the pixel area and the pad area, wherein the stress separation line comprises a compensation line having an inclination with respect to the short side direction of the substrate in the pad area, and wherein the inclination of the compensation line is set so that the compensation line intersects a radial direction from a center of the substrate, wherein the stress separation line comprises a plurality of parallel stress separation lines in a top view of the substrate, wherein a width of a portion of the stress separation line is greater than a width of the semiconductor light emitting device, and wherein the plurality of parallel stress separation lines and the compensation line are arranged symmetrically with respect to a line crossing the center of the substrate in the top view of the substrate. 10. The display device using the semiconductor light emitting device according to claim 9 , wherein the stress separation line is continuously arranged with respect to the short side direction. 11. The display device using the semiconductor light emitting device according to claim 9 , wherein the plurality of stress separation lines are arranged at regular intervals with respect to a line crossing the center of the substrate. 12. The display device using the semiconductor light emitting device according to claim 9 , wherein the pad area comprises a first area where a connection wire connecting the pixel area and the driving chip is located, and a second area outside the driving chip. 13. The display device using the semiconductor light emitting device according to claim 9 , wherein the stress separation line is connected to the compensation line and comprises an extension line formed in a direction parallel to the short side direction. 14. The display device using the semiconductor light emitting device according to claim 9 , wherein the stress separation line is configured to separate the transmission of at least one of stress caused by a difference in thermal expansion coefficient between the barrier layer and the substrate and stress generated during thermal curing of the barrier layer. 15. The display device using the semiconductor light emitting device according to claim 13 , wherein the extension line of the stress separation line parallel to the short side direction is not vertically overlapped with an electrode electrically connected the semiconductor light emitting device on the substrate.

Assignees

Inventors

Classifications

  • H10W90/00Primary

    Package configurations · CPC title

  • Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title

  • characterised by their shape, e.g. curved or truncated substrates · CPC title

  • having stress relaxation structures, e.g. buffer layers · CPC title

  • Coatings, e.g. passivation layers or antireflective coatings · CPC title

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What does patent US12364065B2 cover?
The present invention is applicable to display device-related technical fields and, for example, relates to a display device using micro LED (Light Emitting Diode) and a method of manufacturing the same. The present invention includes a substrate including a pixel area and a pad area located around the pixel area; a barrier layer located on the substrate and defining a plurality of unit pixel a…
Who is the assignee on this patent?
Lg Electronics Inc, Lg Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 15 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).