Multilayered flexible interconnect circuits for battery assemblies and methods of fabricating and installing thereof

US12362437B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12362437-B2
Application numberUS-202418924233-A
CountryUS
Kind codeB2
Filing dateOct 23, 2024
Priority dateNov 13, 2023
Publication dateJul 15, 2025
Grant dateJul 15, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided are multilayered flexible interconnect circuits comprising multiple conductive layers. Also provided are methods of fabricating such circuits and also methods of fabricating battery assemblies with such circuits. A multilayered flexible interconnect circuit comprises at least two conductive layers and at least one inner insulator, which extends between these conductive layers in some circuit portions and allows for conductive layers to directly interface in other circuit portions (e.g., busbar portions). Outer insulators can be provided to insulate these conductive layers from the environment while allowing some access to these layers as needed. Each conductive layer and insulator can be individually patterned to achieve these functions. One or more insulators support conductive layers relative to each other as well as different portions (e.g., disjoined portions) of the same conductive layer. The same multilayered flexible interconnect circuit can provide battery interconnect, voltage/temperature sense, and/or other functions.

First claim

Opening claim text (preview).

The invention claimed is: 1. A multilayered flexible interconnect circuit comprising: a first outer insulator layer; a second outer insulator layer; an inner insulator layer; a first conductive layer; and a second conductive layer, wherein: the first outer insulator layer, the second outer insulator layer, the inner insulator layer, the first conductive layer, and the second conductive layer collectively define a busbar portion, a busbar support portion, an insulated conductor portion, and a metal-free portion of the flexible interconnect circuit, in the busbar portion, the first conductive layer and the second conductive layer directly interface with each other while a surface of the first conductive layer facing away from the second conductive layer is exposed, in the busbar support portion, the inner insulator layer is stacked between and directly interfaces each of the first conductive layer and the second conductive layer, in the busbar support portion, the first conductive layer is stacked between and directly interfaces the first outer insulator layer and the inner insulator layer, in the busbar support portion, the second conductive layer is stacked between and directly interfaces the inner insulator layer and the second outer insulator layer, and each of the first conductive layer and the second conductive layer comprises aluminum and has a thickness of 100-400 micrometers. 2. A multilayered flexible interconnect circuit comprising: a first outer insulator layer; a second outer insulator layer; an inner insulator layer; a first conductive layer; and a second conductive layer, wherein: the first outer insulator layer, the second outer insulator layer, the inner insulator layer, the first conductive layer, and the second conductive layer collectively define a busbar portion, a busbar support portion, an insulated conductor portion, and a metal-free portion of the flexible interconnect circuit, in the busbar portion, the first conductive layer and the second conductive layer directly interface with each other while a surface of the first conductive layer facing away from the second conductive layer is exposed, in the busbar support portion, the inner insulator layer is stacked between and directly interfaces each of the first conductive layer and the second conductive layer, in the busbar support portion, the first conductive layer is stacked between and directly interfaces the first outer insulator layer and the inner insulator layer, in the busbar support portion, the second conductive layer is stacked between and directly interfaces the inner insulator layer and the second outer insulator layer, and in the metal-free portion, the inner insulator layer is stacked between and directly interfaces the first outer insulator layer and the second outer insulator layer. 3. The multilayered flexible interconnect circuit of claim 2 , wherein, in the insulated conductor portion: the second conductive layer is stacked between and directly interfaces the inner insulator layer and the second outer insulator layer, and the inner insulator layer is stacked between and directly interfaces the second conductive layer and the first outer insulator layer. 4. The multilayered flexible interconnect circuit of claim 3 , wherein the insulated conductor portion is positioned between the busbar support portion and metal-free portion. 5. The multilayered flexible interconnect circuit of claim 1 , wherein the busbar support portion at least partially surrounds the busbar portion. 6. The multilayered flexible interconnect circuit of claim 1 , wherein the busbar support portion is positioned between the busbar portion and the metal-free portion. 7. A multilayered flexible interconnect circuit comprising: a first outer insulator layer; a second outer insulator layer; an inner insulator layer; a first conductive layer; and a second conductive layer, wherein: the first outer insulator layer, the second outer insulator layer, the inner insulator layer, the first conductive layer, and the second conductive layer collectively define a busbar portion, a busbar support portion, an insulated conductor portion, and a metal-free portion of the flexible interconnect circuit, in the busbar portion, the first conductive layer and the second conductive layer directly interface with each other while a surface of the first conductive layer facing away from the second conductive layer is exposed, in the busbar support portion, the inner insulator layer is stacked between and directly interfaces each of the first conductive layer and the second conductive layer, in the busbar support portion, the first conductive layer is stacked between and directly interfaces the first outer insulator layer and the inner insulator layer, in the busbar support portion, the second conductive layer is stacked between and directly interfaces the inner insulator layer and the second outer insulator layer, and each of the first outer insulator layer, the second outer insulator layer, the inner insulator layer, the first conductive layer, and the second conductive layer is formed from a same starting sheet. 8. A multilayered flexible interconnect circuit comprising: a first outer insulator layer; a second outer insulator layer; an inner insulator layer; a first conductive layer; and a second conductive layer, wherein: the first outer insulator layer, the second outer insulator layer, the inner insulator layer, the first conductive layer, and the second conductive layer collectively define a busbar portion, a busbar support portion, an insulated conductor portion, and a metal-free portion of the flexible interconnect circuit, in the busbar portion, the first conductive layer and the second conductive layer directly interface with each other while a surface of the first conductive layer facing away from the second conductive layer is exposed, in the busbar support portion, the inner insulator layer is stacked between and directly interfaces each of the first conductive layer and the second conductive layer, in the busbar support portion, the first conductive layer is stacked between and directly interfaces the first outer insulator layer and the inner insulator layer, in the busbar support portion, the second conductive layer is stacked between and directly interfaces the inner insulator layer and the second outer insulator layer, and each of the first outer insulator layer, the second outer insulator layer, the inner insulator layer, the first conductive layer, and the second conductive layer has the same thickness and composition throughout an entire footprint of the flexible interconnect circuit. 9. A multilayered flexible interconnect circuit comprising: a first outer insulator layer; a second outer insulator layer; an inner insulator layer; a first conductive layer; and a second conductive layer, wherein: the first outer insulator layer, the second outer insulator layer, the inner insulator layer, the first conductive layer, and the second conductive layer collectively define a busbar portion, a busbar support portion, an insulated conductor portion, and a metal-free portion of the flexible interconnect circuit, in the busbar portion, the first conductive layer and the second conductive layer directly interface with each other while a surface of the first conductive layer facing away from the second conductive layer is exposed, in the busbar support portion, the inner insulator layer is stacked between and directly interfaces each of the first conductive layer and the second conductive layer, in the busbar support portion, the first conductive layer is stacked between and directly interfaces the first outer insulator

Assignees

Inventors

Classifications

  • Energy storage using batteries · CPC title

  • comprising an arrangement of two or more busbars within a container structure, e.g. busbar modules · CPC title

  • Cooling or keeping cold · CPC title

  • H01M50/524Primary

    Organic material · CPC title

  • Surfaces specially adapted for heat dissipation or radiation, e.g. fins or coatings · CPC title

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What does patent US12362437B2 cover?
Provided are multilayered flexible interconnect circuits comprising multiple conductive layers. Also provided are methods of fabricating such circuits and also methods of fabricating battery assemblies with such circuits. A multilayered flexible interconnect circuit comprises at least two conductive layers and at least one inner insulator, which extends between these conductive layers in some c…
Who is the assignee on this patent?
Cellink Corp
What technology area does this patent fall under?
Primary CPC classification H01M50/524. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 15 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).