Dynamic generation of layout adaptive packaging

Patent metadata

Field	Value
Publication number	US-12360467-B2
Application number	US-202318523620-A
Country	US
Kind code	B2
Filing date	Nov 29, 2023
Priority date	Nov 15, 2018
Publication date	Jul 15, 2025
Grant date	Jul 15, 2025

Abstract

Aspects of disclosure provide a method for attaching wiring connections to a component using both design and field measured data of the component to produce accurate wiring connections.

First claim

What is claimed is:

1. A method for processing an apparatus in a maskless lithography system, comprising:
obtaining coordinate data on a component and an aspect of an electrical connection to the component in a designed state;
measuring the component with at least one device to develop a second set of coordinate data for the component;
comparing the obtained coordinate data of the component to the second set of coordinate data for the component to determine an offset of the component measured with the device to the designed state;
altering the aspect of the electrical connection to the component based, at least in part, upon one of the offset, images of the component used to develop the second set of coordinate data for the component, and the second set of coordinate data for the component prior to forming the electrical connection; and
forming an altered electrical connection on an electrical connection location between an edge of the component and a predetermined location.

2. The method according to claim 1 , wherein the component is placed upon a substrate, and wherein the substrate is placed upon an indexing table of the maskless lithography system within range of the at least one device associated with the maskless lithography system.

3. The method according to claim 1 , wherein the method is performed in-situ in the maskless lithography system.

4. The method according to claim 1 , wherein the comparing the obtained coordinate data to the second set of coordinate data further comprises comparing the offset to a threshold.

5. The method according to claim 4 , further comprising:
when the offset is less than the threshold, setting the offset to zero.

6. The method according to claim 4 , further comprising:
when the offset is greater than the threshold, generating a warning to a user that the threshold has been exceeded.

7. The method according to claim 1 , further comprising providing the electrical connection location between the component and the predetermined location using the altered aspect of the electrical connection prior to forming the altered electrical connection.

8. The method according to claim 1 , wherein the altering of the aspect of the electrical connection is based upon the offset.

9. The method according to claim 1 , wherein the component is a die and the altered electrical connection is formed on the electrical connection location between the edge of the die and the predetermined location.

10. The method according to claim 9 , wherein the predetermined location is an external area or another die.

11. A method for processing an apparatus in a maskless microlithography system, comprising:
obtaining position data on a component and an aspect of an electrical connection to the component for a designed state;
measuring a stage including the component with at least one device to develop a second set of coordinate data for the component and the electrical connection;
comparing the obtained coordinate data of the component to the second set of coordinate data for the component to determine an offset of the component measured with the at least one device to the designed state;
altering the aspect of the electrical connection to the component based, at least in part, upon the offset prior to forming the electrical connection; and
forming an altered electrical connection on an electrical connection location between an edge of the component and a predetermined location.

12. The method according to claim 11 , wherein the method is performed in-situ in the maskless microlithography system.

13. The method according to claim 11 , further comprising:
placing the component upon a substrate;
placing the substrate on the stage of the maskless microlithography system; and
placing the stage within range of at least one device of the maskless microlithography system.

14. The method according to claim 11 , further comprising:
providing the electrical connection location between the component and the predetermined location using the altered aspect of the electrical connection prior to forming the altered electrical connection.

15. The method according to claim 11 , wherein the comparing the obtained coordinate data to the second set of coordinate data further comprises comparing the offset to a threshold; wherein
when the offset is less than the threshold, setting the offset to zero; and
when the offset is greater than the threshold, generating a warning to a user that the threshold has been exceeded.

16. The method according to claim 11 , wherein the altering the aspect of the electrical connection is based upon the offset.

17. The method according to claim 11 , wherein the component is a die and the altered electrical connection is formed on the electrical connection location between the edge of the die and the predetermined location.

18. The method according to claim 17 , wherein the predetermined location is an external area or another die.

19. A method for processing a substrate in a maskless microlithography system, comprising:
obtaining coordinate data in a designed state pertaining to at least one component and an aspect of at least one wiring connection to the at least one component, wherein the component is at least one of on and in the substrate;
measuring the substrate including the component with a device to develop a second set of coordinate data for the component;
comparing the obtained coordinate data of the component of a stage to the second set of coordinate data for the component to determine an offset of the component measured with the device to the designed state;
altering the aspect of the at least one wiring connection to the component based, at least in part, upon one of the offset, images of the component used to develop the second set of coordinate data for the component, and the second set of coordinate data for the component prior to forming the at least one wiring connection; and
forming an altered wiring connection on an electrical connection location between an edge of the component and a predetermined location.

20. The method according to claim 19 , wherein the method is performed in-situ in the maskless microlithography system.

21. The method according to claim 19 , wherein the comparing the obtained coordinate data to the second set of coordinate data further comprises comparing the offset to a threshold; wherein
when the offset is less than the threshold, setting the offset to zero; and
when the offset is greater than the threshold, generating a warning to a user that the threshold has been exceeded.

22. The method according to claim 19 , further comprising:
placing the component upon the substrate;
placing the substrate on the stage within the microlithography system; and
moving the substrate on the stage to the device of the maskless microlithography system.

23. The method according to claim 19 , further comprising:
providing the electrical connection location between the component and the predetermined location using the altered aspect of the wiring connection prior to forming the altered wiring connection.

24. The method according to claim 19 , wherein the altering the aspect of the at least one wiring connection is based upon the offset.

25. The method according to claim 19 , wherein the component is a die and the altered electrical connection is formed on the electrical connection location between the edge of the die and the predetermin

Assignees

• Applied Materials Inc

Inventors

• Hollerbach Uwe
• Laidig Thomas L

Classifications

• H10P76/2041

  Photolithographic processes · CPC title

• G03F7/70383

  Direct write, i.e. pattern is written directly without the use of a mask by one or multiple beams (maskless lithography using a programmable mask G03F7/70291) · CPC title

• G03F7/70291 Primary

  Addressable masks, e.g. spatial light modulators [SLMs], digital micro-mirror devices [DMDs] or liquid crystal display [LCD] patterning devices · CPC title

• G03F7/70508

  Data handling in all parts of the microlithographic apparatus, e.g. handling pattern data for addressable masks or data transfer to or from different components within the exposure apparatus · CPC title

• G03F7/70475

  Stitching, i.e. connecting image fields to produce a device field, the field occupied by a device such as a memory chip, processor chip, CCD, flat panel display · CPC title